EPM3064ALC44-10 vs EPM3064ALC44-10N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM3064ALC44-10 sa pamamagitan ng Altera at EPM3064ALC44-10N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Altera
EPM3064ALC44-10N - MAX 3000A CPLD, 64 Macrocells, 34 I/O | Intel / Altera
EPM3064ALC44-10N ObsoletePagsanggunian na paghahambing
| Parametro | EPM3064ALC44-10 | EPM3064ALC44-10N |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | Obsolete |
| Family | MAX 3000A | — |
| Logic Elements / Macrocells | 64 macrocells | — |
| Number of Logic Array Blocks (LABs) | 4 | — |
| Usable Gates | 1,250 | 1,250 |
| Maximum User I/O Pins | 34 | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.0 V to 3.6 V |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency (fCNT) | 192.3 MHz | — |
| Maximum Operating Frequency (fMAX) | [DATA_NEEDED: fMAX internal] | — |
| Packhaging | 44-PLCC (J-Lead) | 44-pin PLCC (LC44) |
| Process Technology | 0.30 µm CMOS EEPROM | — |
| Programmability | In-system programmable (JTAG IEEE 1149.1) | — |
| MultiVolt I/O | 2.5V / 3.3V / 5.0V interface compatible | — |
| Temperature na Operasyon | 0°C to +70°C (commercial) | [DATA_NEEDED: commercial / industrial grade] |
| Tindminan RoHS | Compliant (lead-free L suffix indicates Pb-free package) | Compliant |
| Uri ng Pagpapasok | Surface Mount (PLCC socket compatible) | Surface Mount (PLCC socket compatible) |
| Product Family | — | MAX 3000A |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macrocells | — | 64 |
| Logic Array Blocks (LABs) | — | 4 |
| User I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency | — | 227.3 MHz |
| I/O Bank Voltage (VCCIO) | — | 3.0 V to 3.6 V (MultiVolt) |
| Configuration Memory | — | CMOS EEPROM |
| In-System Programmability | — | Yes (IEEE 1149.1 JTAG, IEEE 1532 compliant) |
| Open-Drain Output Option | — | Yes (per I/O pin) |
| Output Slew-Rate Control | — | Programmable |