EPM9320ALC84-15 vs EPM9320ALC84-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9320ALC84-15 sa pamamagitan ng Altera at EPM9320ALC84-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9320ALC84-15 | EPM9320ALC84-20 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | NRND | NRND |
| Family | MAX 9000 CPLD | MAX 9000 |
| Macrocells | 320 | 320 |
| Usable Gates | 6000 | — |
| Propagation Delay (tPD) | 16 ns | — |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| User I/O | 56 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| Technology | CMOS, EEPROM-based configuration | — |
| Packhaging | 84-pin PLCC (S-PQCC-J84, J-lead) | PLCC-84 |
| Uri ng Pagpapasok | Through-hole / socket | Surface Mount (PLCC socket compatible) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Temperature na Operasyon | -40C to +85C (industrial) | [DATA_NEEDED: commercial or industrial grade] |
| Tindminan RoHS | [DATA_NEEDED: rohs status] | [DATA_NEEDED: per Altera datasheet] |
| Level ng Sensitivity sa Asid ng Moisture (MSL) | MSL-3 (168 hours per fpgalink.com) | — |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead free status] | — |
| RoHS3 Compliance | ROHS3 Compliant (per fpgalink.com listing) | — |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Maximum User I/Os | — | 212 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Process Technology | — | 0.5 µm CMOS EEPROM |
| Volte ng Pagbibigay | — | 5.0 V |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| Configuration Memory | — | Non-volatile EEPROM |
| Boundary Scan | — | JTAG IEEE 1149.1 |
| Design Software | — | MAX+PLUS II / Quartus II (legacy) |