MCIMX31CVMN4CR2 vs MCIMX31LCVMN4C Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng MCIMX31CVMN4CR2 sa pamamagitan ng NXP Semiconductors at MCIMX31LCVMN4C sa pamamagitan ng NXP Semiconductors. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
NXP Semiconductors
MCIMX31CVMN4CR2 - i.MX31 ARM1136 400MHz MPU, 473-LFBGA | NXP
MCIMX31CVMN4CR2 NrndNXP Semiconductors
MCIMX31LCVMN4C - i.MX31L ARM1136 400MHz MPU, MAPBGA-457 | NXP
MCIMX31LCVMN4C ⚠ Huling PagbiliPagsanggunian na paghahambing
| Parametro | MCIMX31CVMN4CR2 | MCIMX31LCVMN4C |
|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors |
| Kategorya | Microcontrollers | Microcontrollers |
| Katayuan ng Lifecycle | NRND | Huling Pagbili |
| Core Architecture | ARM1136JF-S | ARM1136JF-S |
| Core Count | 1 | 1 |
| Width ng Data Bus | 32-bit | 16-bit |
| Maximum Core Frequency | 400 MHz | — |
| Supply Voltage na Operasyon | 1.8 V to 2.0 V core, 1.8 V to 3.3 V I/O | — |
| Packhaging / Kaso | 473-LFBGA (MAPBGA-473) | — |
| Package Dimensions | 19 mm x 19 mm | 14 x 14 mm |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| RAM Size (on-chip SRAM) | 16K x 8 | — |
| Packaging | Tape & Reel (TR) | — |
| Oscillator Type | External | — |
| On-chip Multimedia | MPEG-4/H.263 encoder/decoder, Image Processing Unit (IPU) | — |
| Peripheral Interfaces | USB, Ethernet MAC, UART, I2C, SPI, MMC/SD | — |
| Hanay ng Temperature na Operasyon | -40 C to +85 C (automotive/industrial grade) | -40C to +85C |
| Family | i.MX31 multimedia applications processors | i.MX31L |
| Tindminan RoHS | Compliant | Compliant |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free and halogen-free status] | — |
| Maksimum na Taktiko ng Oras | — | 400 MHz |
| Package Type | — | MAPBGA-457 |
| Ball Pitch | — | 0.5 mm |
| Bilang ng Pin | — | 457 |
| Variant Suffix | — | N4C (industrial/auto temp grade) |
| Process Node | — | [DATA_NEEDED: process node] |
| L1 Cache | — | [DATA_NEEDED: L1 instruction/data cache] |
| L2 Cache | — | [DATA_NEEDED: L2 cache] |
| Integrated LCD Controller | — | Yes |
| USB Interface | — | USB 2.0 with on-chip PHY |
| Image Processing Unit (IPU) | — | Yes |
| AEC-Q100 Grade | — | Grade 3 |