EP20K200CQ240C7N vs EP20K200CQ240C8N 比較
詳細並排比較 EP20K200CQ240C7N 由 Altera 與 EP20K200CQ240C8N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP20K200CQ240C7N | EP20K200CQ240C8N |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 最後購買 | Obsolete |
| Product Type | Field Programmable Gate Array (FPGA) | Loadable Programmable Logic Device (PLD / FPGA) |
| Family | APEX-20KC | APEX 20KC |
| Logic Elements / Cells | 8320 | 8,320 cells |
| Total RAM Bits | 106496 | — |
| Number of User I/Os | 168 | — |
| Number of Dedicated Inputs | 4 | — |
| Typical Gate Count | 200K gates | — |
| Supply Voltage Range | 1.71 V to 1.89 V | — |
| Nominal Supply Voltage | 1.8 V | — |
| 最大時脈頻率 | 357.16 MHz per Microchip USA; Jotrin lists 375.94 MHz | 301.21 MHz |
| Process Technology | 0.15 um | 0.15 um |
| 封裝 / 外殼 | 240-BFQFP (PQFP/FQFP) | 240-Pin PQFP (CQ240) |
| Number of Terminals | 240 | — |
| Package Code | FQFP | — |
| Package Shape | Square | — |
| Terminal Form | Gull Wing | — |
| 安裝類型 | Surface Mount | Surface Mount |
| Lead-Free Finish | Yes (N suffix) | — |
| RoHS 狀態 | [DATA_NEEDED: RoHS status not stated in provided listings] | — |
| 熱阻 | [DATA_NEEDED: theta-JA] | — |
| Manufacturer | — | Altera Corporation |
| Series | — | EP20K200 |
| Total Gates (typical) | — | 200K gates |
| Dedicated I/O Lines | — | 168 |
| Input Terminals | — | 164 |
| Dedicated I/O Pins | — | 160 |
| Core Supply Voltage | — | 1.8 V |
| Speed Grade | — | 8 (from C8N suffix) |
| Temperature Grade | — | Commercial (C) [DATA_NEEDED: exact operating temperature range in °C] |
| Configuration Device Support | — | Altera enhanced configuration device (from EP20K200 datasheet description) |
| I/O Voltage Support | — | [DATA_NEEDED: supported I/O bank standards and voltage ranges] |
| Embedded RAM Bits | — | [DATA_NEEDED: total memory bits for EP20K200] |
| RoHS / Lead-Free Status | — | [DATA_NEEDED: RoHS status; N suffix normally used for lead-free but not stated in fetched data] |