EP3SE50F780C4N vs EP3SE50F780C2 比較
詳細並排比較 EP3SE50F780C4N 由 Intel 與 EP3SE50F780C2 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EP3SE50F780C4N | EP3SE50F780C2 |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | NRND | NRND |
| Family | Stratix III E | Stratix III E |
| Logic Elements (LE) | 47,500 | 47,500 |
| Embedded Memory Bits | 5,760,000 | — |
| Embedded Memory (M9K/M144K blocks) | 488 (per family datasheet) | — |
| Number of LABs | 1900 | — |
| Maximum User I/Os | 488 | — |
| DSP Blocks (18x18 multipliers) | 432 | 384 |
| PLLs | 12 (per family datasheet) | — |
| Maximum Operating Frequency | 717 MHz | — |
| Transceiver Channels | Up to 12 (per family, model-dependent) | — |
| Transceiver Data Rate | Up to 6.375 Gbps (per Stratix III E family) | — |
| Process Node | 40 nm | — |
| 封裝 | 780-Ball FBGA, 29 mm x 29 mm, 1.0 mm pitch | 780-BBGA, FC-FBGA |
| 安裝類型 | Surface Mount (BGA) | Surface Mount |
| 供應電壓 | Core 0.9 V, I/O 1.2 V-3.3 V (multi-rail) | — |
| 工作溫度 | 0C to +85C (C4 commercial grade) | — |
| Configuration Modes | JTAG, Passive Serial, Fast Passive Parallel | — |
| RoHS 狀態 | Lead-free / RoHS compliant | [DATA_NEEDED: current RoHS status] |
| MSL 等級 | 3 (per JEDEC J-STD-020, FBGA package) | — |
| Hard Memory Controller | DDR2/DDR3 SDRAM (per Stratix III E family) | — |
| Manufacturer | — | Intel (formerly Altera) |
| LABs / CLBs | — | 1,900 |
| Total Memory Bits | — | 5,760,000 |
| User I/O Count | — | 488 |
| Core Voltage | — | 1.1 V |
| Process Technology | — | 65 nm |
| Operating Frequency | — | Up to 600 MHz |
| Number of Pins / Terminals | — | 780 |
| Form of Terminal | — | Ball |
| Package Code | — | BGA |
| Operating Temperature Grade | — | Commercial (C2) |