EPC2L20 vs EPC2LC20CAD 比較
詳細並排比較 EPC2L20 由 Altera 與 EPC2LC20CAD 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPC2L20 | EPC2LC20CAD |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | Obsolete | Obsolete |
| 記憶體類型 | Configuration PROM (non-volatile) | Configuration PROM (Flash) |
| 記憶體容量 | 1.6 Mbit | — |
| 組織 | 8-bit byte | — |
| 介面 | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) | — |
| Programmability | In-system programmable via JTAG | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (VCCSEL selectable) | — |
| Cascade Support | Yes - multi-device daisy chain | — |
| Boundary Scan | JTAG IEEE 1149.1 BST | — |
| 封裝 | 20-pin PLCC (J-lead) | 20-pin J-lead PLCC (PLCC-20) |
| 安裝類型 | Surface Mount (PLCC socket compatible) | Surface Mount / Through-hole (PLCC socket) |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40C to +85C (commercial) |
| MSL 等級 | [DATA_NEEDED: MSL rating] | — |
| RoHS 狀態 | RoHS Compliant (per IC Components listing) | Compliant |
| Process Technology | Low-power CMOS | — |
| Target FPGAs | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix | — |
| Memory Capacity | — | 1.6 Mbit |
| 供應電壓 | — | 3.3 V (nominal) |
| I/O Voltage Tolerance | — | 5 V tolerant |
| Configuration Mode | — | Serial (bit-wide, Altera FPGAs) |
| Program Interface | — | IEEE Std 1149.1 JTAG (in-system programmable) |
| 腳位數 | — | 20 |
| Maximum Input Voltage (DC) | — | -0.3 V to +7.0 V |
| Input Undershoot/Overshoot | — | -2.0 V to +7.0 V for <100 mA, <20 ns no-load |
| Compatible FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, Stratix |
| Programming Method | — | JTAG ISP (no external programmer required) |