EPC2T32U vs EPC2T32N 比較

詳細並排比較 EPC2T32U 由 Altera 與 EPC2T32N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EPC2T32U EPC2T32N
品牌 Altera Altera
類別 Memory ICs FPGA & CPLD
生命週期狀態 Obsolete Obsolete
功能 Configuration PROM for SRAM-based LUT FPGAs —
Memory Density 1.6 Mbit —
供應電壓 3.3 V or 5.0 V (user-selectable) —
Programmability In-system programmable via JTAG (IEEE 1149.1) —
Configuration Modes Supported Passive serial, passive parallel synchronous, passive parallel asynchronous, JTAG —
封裝 32-pin TQFP 32-TQFP (7x7 mm)
工作溫度 Commercial / Industrial grade [DATA_NEEDED: exact range] 0 C to +70 C
Cascading Support Yes, via dedicated cascade port for density expansion —
Compression Support Altera bitstream decompression (up to 50% storage reduction) —
Compatible FPGA Families APEX II, APEX 20K, Mercury, ACEX 1K —
Lead-Free Finish Yes (per part suffix 'U') —
安裝類型 Surface Mount Surface Mount
MSL 等級 [DATA_NEEDED: MSL rating] —
RoHS 狀態 Compliant Compliant (lead-free)
Hand-shake Pins nSTATUS, nCONFIG, CONF_DONE —
記憶體容量 — 1.6 Mbit
Programmable Type — In System Programmable (Flash)
Configuration Mode — Passive Serial (PS) / JTAG ISP
最大時脈頻率 — 10 MHz
Supply Voltage - VCCINT — 3.0 V to 3.6 V / 4.75 V to 5.25 V (dual supply)
介面 — Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE)
JTAG Compliance — IEEE 1149.1 (boundary-scan, ISP)
腳位數 — 32
Sector Architecture — Flash with built-in CRC
Cascade Support — Yes (multi-device daisy-chain)
CONF_DONE / nSTATUS Drive — Open-drain

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