EPM240GT100C3 vs EPM240F100C5N 比較
詳細並排比較 EPM240GT100C3 由 Intel 與 EPM240F100C5N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM240GT100C3 | EPM240F100C5N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 啟用中 |
| Family | MAX II | — |
| Logic Elements (LE) | 240 | — |
| Equivalent Macro Cells | 192 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| Maximum Internal Frequency (fMAX) | 304 MHz | — |
| User I/O Count | 80 | — |
| User Flash Memory (UFM) | 8 Kbit | — |
| Process Technology | 0.18 µm 6-layer-metal flash | — |
| Core Supply Voltage | 1.8 V (internal) | — |
| I/O Bank Voltages (MultiVolt) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | JTAG / ByteBlasterMV |
| 封裝 | TQFP-100 (100-TQFP, 16 × 16 mm, 0.5 mm pitch) | 100-ball FineLine BGA (FBGA-100) |
| 工作溫度 | 0 °C to 85 °C (commercial, C3 suffix) | — |
| 安裝類型 | Surface Mount | Surface Mount (BGA) |
| MSL 等級 | 3 (168 hours) | — |
| Device Family | — | MAX II |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/O Pins (maximum) | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.7 ns |
| Maximum Operating Frequency | — | [DATA_NEEDED: fmax per datasheet] |
| Global Clock Networks | — | [DATA_NEEDED: count] |
| 工作溫度範圍 | — | 0C to +85C (commercial) |
| Supply Voltage Core (VCCINT) | — | 3.3 V |
| I/O Bank Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) |
| Configuration Memory | — | Non-volatile flash (instant-on) |
| JTAG Support | — | IEEE 1149.1 boundary-scan |
| RoHS 狀態 | — | Compliant |