EPM240T100I5 vs EPM240T100I3N 比較
詳細並排比較 EPM240T100I5 由 Intel 與 EPM240T100I3N 由 Intel. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
Intel
EPM240T100I3N - 192-Macrocell MAX II CPLD, 100-TQFP, Industrial | Intel
EPM240T100I3N ⚠ 最後購買機會規格比較
| 參數 | EPM240T100I5 | EPM240T100I3N |
|---|---|---|
| 品牌 | Intel | Intel |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | 啟用中 | 最後購買 |
| Family | MAX II | MAX II |
| Series | EPM240 | — |
| Device Sub-family | EPM240T100 | — |
| Logic Elements (LE) | 240 | — |
| Equivalent Macrocells | 192 | — |
| User Flash Memory (UFM) | 8 Kbits | — |
| Maximum User I/O Pins | 80 | 80 |
| 封裝 | TQFP-100 (100-pin) | TQFP-100 (T100), 14x14 mm, 0.5 mm pitch |
| 工作溫度 | -40C to +100C (industrial) | — |
| Speed Grade | I5 | 3 |
| Core Voltage | 3.3 V | — |
| MultiVolt I/O Support | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Propagation Delay (typical) | 4-7 ns | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG / IEEE 1149.1 ISP |
| 安裝類型 | Surface Mount | — |
| RoHS 狀態 | [DATA_NEEDED: rohs status] | Compliant |
| Device Logic Elements / Macrocells | — | 192 macrocells |
| Number of Logic Array Blocks (LABs) | — | 4 |
| On-chip User Flash Memory | — | 8 Kbits |
| Internal Performance | — | 304 MHz |
| Pin-to-pin Logic Delay (tPD1) | — | 4.6 ns |
| Global Clock Networks | — | 4 |
| Technology Node | — | 0.18 um, 6-layer-metal flash CMOS |
| Supply Voltage - Core | — | 2.5 V / 3.3 V |
| 工作接面溫度 | — | -40C to +100C (industrial, 'I' grade) |
| Instant-on (non-volatile) | — | Yes (flash-based) |
| MSL 等級 | — | 3 (per JEDEC J-STD-020) |