H5AN8G4NAFR-PBC vs H5AN8G4NAFR-RDC 比較
詳細並排比較 H5AN8G4NAFR-PBC 由 SK hynix 與 H5AN8G4NAFR-RDC 由 SK hynix. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | H5AN8G4NAFR-PBC | H5AN8G4NAFR-RDC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 類別 | DRAM | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | DDR4 SDRAM | DDR4 SDRAM |
| Density | 8 Gb | 8Gb |
| 組織 | 2Gb x 4 | 1G x 4 |
| Interface Voltage (VDD/VDDQ) | 1.2 V +/- 0.06 V | — |
| Wordline Pump Voltage (VPP) | 2.5 V (+0.25/-0.125 V) | — |
| Speed Bins (per datasheet) | DDR4-1600 / 1866 / 2133 / 2400 (DLL ON) | — |
| Bank Groups | 4 (BG0-BG1) | — |
| Banks | 16 (4 bank groups x 4 banks) | — |
| Row Address | A0-A16 (17 bits) | — |
| 封裝 | 78-ball FBGA | FBGA-78 |
| 安裝類型 | Surface Mount | Surface Mount |
| Technology | CMOS | — |
| Lead-Free / Halogen-Free | Yes (RoHS Compliant per datasheet) | — |
| RoHS 狀態 | Compliant | Compliant (Lead-Free) |
| 工作溫度範圍 | [DATA_NEEDED: operating temperature range] | — |
| CAS 延遲 | [DATA_NEEDED: CL for PBC speed bin] | — |
| Geardown Mode Note | DDR4-1600/1866/2133/2400 bins valid only when Geardown Mode is disabled | — |
| Supply Voltage (VDD) | — | 1.2 V |
| Data Rate Class | — | [DATA_NEEDED: exact -RDC speed bin MT/s] |
| CAS Latency (CL) | — | [DATA_NEEDED: CL for -RDC bin] |
| 介面 | — | Synchronous, differential clock CK_t/CK_c |
| Bank Architecture | — | DDR4 bank-group architecture |
| 無鹵素 | — | Yes |
| 工作溫度 | — | [DATA_NEEDED: operating temperature range] |
| Refresh | — | Self-refresh and auto-refresh per DDR4 SDRAM standard |
| Manufacturer | — | SK hynix |
| Datasheet Revision | — | Rev. 1.2 / Jul. 2017 |