ATSAMA5D35A-CUR - 536MHz Cortex-A5 MPU, 324-LFBGA | Microchip
MPN： ATSAMA5D35A-CUR ✓ 啟用中ATSAMA5D35A-CUR 概覽
An ARM Cortex-A5 MPU is a microprocessor unit that executes the 32-bit ARMv7-A instruction set with full application-class operating-system support (Linux, RTOS). The SAMA5D3 family sits in Microchip's portfolio between Cortex-M microcontrollers and Cortex-A application processors, targeting headless graphical HMI, industrial control, and connected embedded systems that need richer compute than a microcontroller but lower power than a Cortex-A9/A53. It belongs to the broader MPU taxonomy: application processor -> ARM Cortex-A -> Cortex-A5 -> SAMA5D3 series -> ATSAMA5D35 variant.
Key on-chip peripherals include a 24-bit LCD controller supporting WQVGA up to XGA, a 12-bit parallel camera interface, dual EMAC (10/100 Mbps Ethernet) with hardware TSN time-stamping, USB 2.0 high-speed host and device ports, two HS SDIO/SD/MMC controllers, a 12-bit ADC, and multiple CAN, UART, SPI, I2C, and TWI interfaces. The 128 KB SRAM reduces external DDR access for time-critical code and supports low-power standby retention modes.
The Cortex-A5 core implements the ARMv7-A architecture with NEON SIMD optional, a single-issue superscalar pipeline, and Jazelle and Thumb-2 support. A separate ROM contains the Atmel/Microchip secure bootloader (Secure Boot + encryption engine), and the DDR2/LPDDR/LPDDR2 controller supports up to 1 Gbit of external memory. Hardware crypto accelerators (AES, SHA, TRNG) are integrated for secure connectivity, and a 16-bit Parallel Capture Interface accommodates parallel image sensors.
Typical applications include industrial HMI panels with WQVGA TFT displays, building-automation gateways, machine-to-machine (M2M) controllers with Ethernet and CAN, point-of-sale terminals, smart-grid concentrators, fleet telematics, low-power Linux-based controllers, and embedded graphical control consoles. The dual Ethernet plus hardware crypto make it well-suited for IEC 62443-style secure industrial nodes.
When designing with the ATSAMA5D35A-CUR, ensure the DDR signals are routed with 50-ohm controlled-impedance traces and that the layout follows the manufacturer-provided SAMA5D3 PCB checklist for power-rail decoupling and BGA escape routing. Boot mode selection is strap-based on BMS pins at reset, so any boot media must be wired accordingly. The datasheet's power-sequencing diagram must be respected to avoid latch-up during slow-ramp scenarios.
This page synthesizes distributor pricing, drop-in alternatives within the SAMA5D3 family, application context, and practical design notes that the manufacturer datasheet alone does not consolidate.
直接替換替代品，適用於 ATSAMA5D35A-CUR — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： ATSAMA5D35A-CUR （相同外形與佔位） — 差異在於 Package, Ethernet, USB, Core Architecture, LCD Controller.
ATSAMA5D35A-CU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMA5D34A-CUR
✅ 直接替換聯絡詢價
查看資料表 →ATSAMA5D36A-CU
✅ 直接替換聯絡詢價
查看資料表 →ATSAMA5D31A-CUR
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAMA5D33A-CUR
✅ 直接替換 ⚠️ 規格未經驗證聯絡詢價
查看資料表 →ATSAMA5D35A-CUR 最大額定值與電氣特性
| Core Architecture | ARM Cortex-A5 (ARMv7-A) |
| Core Count | 1 |
| 資料匯流排寬度 | 32-bit |
| Maximum CPU Clock | 536 MHz |
| Instruction Cache | 32 KB |
| Data Cache | 32 KB |
| Internal SRAM | 128 KB |
| Floating Point Unit | Yes (VFPv4) |
| L1 Cache (Total) | 64 KB |
| DDR Controller | 16-bit DDR2 / LPDDR / LPDDR2, up to 1 Gbit |
| 封裝 | 324-LFBGA (15 x 15 mm) |
| 工作溫度 | -40C to +85C (industrial) |
| Supply Voltage (Core) | 1.08 V (min, per FindIC spec) |
| LCD Controller | 24-bit, up to XGA |
| Camera Interface | 12-bit parallel |
| Ethernet | 2x 10/100 EMAC (GMAC) with TSN time-stamping |
| USB | USB 2.0 High-Speed Host + Device |
| SD/MMC | 2x High-Speed SDIO/SD/MMC |
| ADC | 12-bit, 8 channels |
| CAN | 2x CAN-FD controllers |
| Crypto Hardware | AES, SHA, TRNG |
| 安裝類型 | Surface Mount (BGA) |
| RoHS 狀態 | Compliant (Green, Pb-free) |
ATSAMA5D35A-CUR 324-lfbga (15 x 15 mm) 腳位配置指南
ATSAMA5D35A-CUR（324-lfbga (15 x 15 mm) 封裝）的腳位配置。 此數位 IC 包含 GPIO、通訊介面（UART、SPI、I2C）與電源腳位。替代腳位功能與配置選項請參閱製造商資料表。對嵌入式系統設計與 PCB 佈局至關重要。
無詳細腳位定義資料： ATSAMA5D35A-CUR.
請參閱 資料表 以查看完整腳位配置。
典型應用
ATSAMA5D35A-CUR 適用於 7 應用s: Industrial HMI with TFT LCD, Building Automation Gateway, Smart-Grid Concentrator / Energy Logger, Point-of-Sale Terminal, Fleet Telematics and Connected Vehicle Edge Node, Medical Patient-Monitoring Hub, Industrial Machine Vision Edge Controller.
Industrial HMI with TFT LCD
The ATSAMA5D35A-CUR is engineered for industrial HMI panels with graphical TFT displays because it integrates a 24-bit LCD controller (up to XGA) and a 12-bit parallel camera interface. At 536 MHz the Cortex-A5 renders LVGL or Qt-for-embedded UIs fluidly while a Linux4SAM rootfs drives touch input over I2C and exposes CAN-FD for PLC link. The 128 KB internal SRAM keeps the UI frame-copy off external DDR during low-power standby, reducing panel power by tens of milliwatts relative to designs without on-chip SRAM. The 324-LFBGA package is well-suited to compact 3.5 to 7-inch panel PCs that route RGB888 + touch controller + CAN + dual Ethernet.
推薦
Building Automation Gateway
For building-automation and BACnet/Modbus gateways, the ATSAMA5D35A-CUR offers dual 10/100 EMACs with IEEE-1588 hardware timestamping plus CAN-FD, so the same silicon bridges wired fieldbus networks to IP backbones without external bridges. The hardware AES/SHA/TRNG block secures TLS 1.2/1.3 sessions to cloud dashboards, and the 128 KB SRAM allows BACnet routing tables to be cached without taxing external DDR. Linux4SAM (Yocto) supplies full IPv6 + TCP/IP networking, and the industrial temperature grade lets the gateway sit inside unventilated riser closets. Compared to a discrete Cortex-M4 + external Ethernet controller, the ATSAMA5D35A-CUR halves the bill of materials on the same PCB.
推薦
Smart-Grid Concentrator / Energy Logger
The ATSAMA5D35A-CUR is well-suited for smart-grid concentrators because the dual Ethernet plus hardware crypto create a secure DLMS/COSEM gateway able to authenticate meters and forward readings to a head-end. The Cortex-A5 at 536 MHz is more than sufficient for periodic metering data aggregation plus minor on-site analytics (load profiling, anomaly detection). The industrial -40C to +85C rating lets the design live inside an outdoor or pad-mount cabinet. Hardware AES and SHA accelerate TLS sessions across thousands of meter endpoints without bogging the application CPU, leaving headroom for tariff scheduling and local control logic.
推薦
Point-of-Sale Terminal
POS terminals benefit from the ATSAMA5D35A-CUR's USB 2.0 high-speed host (for barcode scanner/MSR), USB device (for PC sync), dual SD/MMC (for transaction log + Wi-Fi module), and EMAC for IP-connected payment gateways. The Cortex-A5 + 128 KB SRAM comfortably runs a slimmed Linux environment with the payment-cert application stack. Hardware AES/TLS secures cardholder-data flows over EMVCo-style sessions, while the -40C to +85C industrial temperature supports terminals in kitchens and outdoor kiosks. Compared to a discrete Cortex-A9 design, the ATSAMA5D35A-CUR typically cuts active power enough to use smaller thermal solutions.
推薦
Fleet Telematics and Connected Vehicle Edge Node
For aftermarket fleet telematics boxes, the ATSAMA5D35A-CUR offers 2x CAN-FD for modern vehicles plus GPS/UART links, dual Ethernet for backhaul on tractor-trailer bridges, and hardware crypto to authenticate OTA firmware. The Cortex-A5 runs containerized telematics stacks on Linux, while the low-power SAMA5 standby modes keep the device idle when the truck is parked without missing wake events from CAN or ignition. The 324-LFBGA package supports compact, vibration-rated PCB assemblies. Automotive-grade SAMA5D2 parts are recommended where AEC-Q100 is mandated; the industrial D35 is acceptable for non-safety cabin or trailer-mounted edge nodes.
推薦
Medical Patient-Monitoring Hub
The ATSAMA5D35A-CUR fits bedside patient-monitoring hubs that aggregate ECG/SpO2/NIBP data over USB, store waveforms locally, and forward HL7 messages to hospital networks via Ethernet. Its hardware crypto accelerators protect PHI in transit using TLS, and the Cortex-A5 easily handles DICOM waveform display on an attached LCD via the 24-bit controller. Linux4SAM LTS kernels give long-term support critical for medical device life cycles, and the 128 KB SRAM holds recent waveform buffers without external DDR churn during alarm events. The industrial temperature grade and 324-LFBGA are both appropriate for medical device enclosures where size and reliability matter.
推薦
Industrial Machine Vision Edge Controller
For line-scan and area-scan machine-vision edge controllers, the ATSAMA5D35A-CUR is a strong fit: it exposes a 12-bit parallel camera interface, an LCD path for on-screen preview, dual GbE-class EMACs to push results upstream, and CAN-FD to talk to PLCs. The Cortex-A5 at 536 MHz runs OpenCV-lite + inferencing pipelines or a vision RTOS that classifies defects before sending only metadata northbound, reducing Ethernet bandwidth by 10-100x. Hardware AES secures firmware against cloning and the 324-LFBGA footprint supports compact machine-mount PCBs. Compared to discrete DSP+MCU solutions, the ATSAMA5D35A-CUR simplifies the BOM and accelerates software-defined inspection upgrades.
推薦
推薦產品摘要
工程參考資料，適用於 ATSAMA5D35A-CUR — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | ATSAMA5D35A-CU | ATSAMA5D34A-CUR | ATSAMA5D36A-CU | ATSAMA5D31A-CUR | ATSAMA5D33A-CUR |
|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 324-LFBGA (15x15 mm) | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same | 324-LFBGA (15x15 mm) - same |
| Core Architecture | Cortex-A5 32-bit 1-core 536 MHz | Cortex-A5 32-bit 1-core 536 MHz | Cortex-A5 32-bit 1-core 536 MHz | Cortex-A5 32-bit 1-core 536 MHz | Cortex-A5 32-bit 1-core 536 MHz | Cortex-A5 32-bit 1-core 536 MHz |
| Internal SRAM | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| LCD Controller | 24-bit up to XGA | 24-bit up to XGA | Reduced / headless | 24-bit up to XGA | Headless variant | Peripheral-reduced SAMA5D3 variant |
| Ethernet | 2x 10/100 EMAC + 1588 | 2x 10/100 EMAC + 1588 | 2x 10/100 EMAC + 1588 | 2x 10/100 EMAC + 1588 | 2x 10/100 EMAC + 1588 | 2x 10/100 EMAC + 1588 |
| Crypto Hardware | AES + SHA + TRNG | AES + SHA + TRNG | AES + SHA + TRNG | AES + SHA + TRNG (expanded) | AES + SHA + TRNG | AES + SHA + TRNG |
| Operating Temperature | -40C to +85C (industrial) | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C | -40C to +85C |
主要差異化特點
- Full 24-bit LCD + camera + dual Ethernet pipeline in one ball map (對比ATSAMA5D31A-CUR)
- Industrial-grade operating range supplied by default (對比ATSAMA5D34A-CUR)
- Single-source Microchip silicon avoids vendor fragmentation (對比ATSAMA5D2 family SAMA5D27/SAMA5D28)
設計說明
Estimated: at 324 balls on 0.8 mm pitch and 15x15 mm body, follow Microchip's SAMA5D3 PCB checklist - use laser-drilled microvias (8-10 mil capture pad), 50 ohm controlled-impedance DDR traces length-matched within ~25 mils, and a 4-layer stack-up with solid GND beneath the BGA. Place eight 100 nF + four 4.7 uF ceramics within 5 mm of the VDDCORE and VDDPLL pins. Decoupling the BGA's underside is impossible for inner balls; rely on top-side placement and stitched GND vias.
Power sequencing for the ATSAMA5D35A-CUR is critical: VDDIODDR and VDDCORE must come up in the order specified in the datasheet's power-up sequencing diagram to avoid latch-up. Shutdown sequencing must also respect the same order in reverse. Estimated: at 536 MHz and typical Linux workload, total chip power is approximately 300-500 mW active, far below the 1.5 W TDP maximum. Use a dedicated PMIC or LDO bank for VDDCORE/VDDPLL rather than resistor-divider drops.
Estimated: the 324-LFBGA package has a theta-JA of approximately 15-20 C/W on a 4-layer JEDEC test PCB. At 0.5 W ambient 25C, junction rises ~10 C, well within industrial limits; at 1.5 W TDP, junction rises ~25-30 C, still within the 85 C rating. Forcing airflow is normally unnecessary for the SAMA5D3 family at typical Linux workloads. Avoid placing the BGA over internal PCB cutouts that would increase theta-JA.
Common pitfalls include incorrect BMS (Boot Mode Select) strap values on reset, mismatched DDR ZQ calibration resistor values, and missing bootstrap firmware programming on QSPI flash. Always validate the boot media image using Microchip's SAM-BA or sam-ba programmer before soldering production PCBs. Do not assume the JTAG pins are enabled at reset - many SAMA5D3 boot modes disable JTAG for security, requiring a customer-programmed debug certificate to recover.
合規資訊
Per distributor and manufacturer pages: RoHS compliant, Green/Pb-free, industrial temperature. Not AEC-Q100 qualified - select SAMA5D2 family for automotive.
