6ED003L02F2XUMA1 vs 6EDL04N02PRXUMA1 Vergleich
Detaillierter Direktvergleich von 6ED003L02F2XUMA1 von Infineon und 6EDL04N02PRXUMA1 von Infineon. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Infineon
6ED003L02F2XUMA1 - 200V 3-Phase Gate Driver IC, OCP, FAULT | Infineon
6ED003L02F2XUMA1 ✓ AktivSpezifikationsvergleich
| Parameter | 6ED003L02F2XUMA1 | 6EDL04N02PRXUMA1 |
|---|---|---|
| Marke | Infineon | Infineon |
| Kategorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3,31 | $2,32 |
| Product Type | Three-phase gate driver IC | 3-Phase Gate Driver IC |
| Topologie | Half-bridge, 3-phase, high-side / low-side | — |
| Anzahl der Ausgänge | 6 (3 high-side + 3 low-side) | — |
| Maximum Blocking Voltage | 200 V | +180 V (VS referenced to GND for high side) |
| Supported Power Switches | 180 V-class IGBTs, power MOSFETs | — |
| Gate Drive Current (typ.) | 0.375 A (source/sink) | — |
| Output Polarity | Inverting | — |
| Over-Current Protection (OCP) | Integrated comparator with FAULT output | — |
| Enable Input | Yes (hardware shutdown) | — |
| FAULT Reporting | Yes (open-drain fault output) | — |
| Level-shift Technology | LS-SOI (Infineon proprietary) | — |
| Gehäuse | PG-TSSOP-28 | PG-TSSOP-28 (28-pin, 4.40 mm width, exposed pad) |
| Packaging Form | Tape & Reel (XUMA1 suffix) | — |
| Betriebstemperatur | -40 C to +125 C (industrial) | — |
| Compliance | EU RoHS compliant | — |
| Montageart | Surface Mount | Surface Mount |
| Driver Configuration | — | Half-bridge (3 high-side + 3 low-side) |
| Rated Supply Voltage (VCC) | — | 200 V class (operating range 10 V to 20 V on VCC) |
| Source Current (typ.) | — | 0.375 A |
| Sink Current (typ.) | — | 0.75 A |
| Bootstrap Diode | — | Integrated (BSD) on all 3 high-side drivers |
| Over-Current Protection | — | Yes (single-shunt, ITRIP/CIN pin) |
| Enable Pin (EN) | — | Yes (active-high) |
| Fault Output (nFAULT) | — | Yes (active-low, open-drain) |
| Input Logic Compatibility | — | CMOS / LSTTL, 3.3 V and 5 V |
| Interlocking / Anti-shoot-through | — | Yes (built-in per phase pair) |
| Process Technology | — | Thin-film SOI (Silicon-On-Insulator) |
| Betriebstemperaturbereich | — | -40 °C to +125 °C |
| Maximum Junction Temperature | — | +150 °C |
| Target Switches | — | MOSFETs up to 180 V, IGBTs up to 180 V |
| MSL-Level | — | MSL3 (per JEDEC J-STD-020, [DATA_NEEDED: confirm level]) |
| RoHS-Status | — | Compliant |