NXP Semiconductors

SPC5601PEF0MLL6 - 32-bit Power Arch MCU, 192KB Flash, 100-LQFP | NXP

Teilenummer: SPC5601PEF0MLL6 ✓ Aktiv
Auf Lager Versand in 1–3 Werktagen
100-LQFP (14x14 mm) Package 64 MHz Speed 192 KB (192K x 8) Memory
Ab $8.75 USD / Stück
MOQ: 1 |
Preis aktualisiert: 2026-10-18
Mengenpreise
Menge Stückpreis Gesamt
1 $13.2346 $13,23
10 $12.1 $121,00
100 $10.95 $1.095,00
500 $9.85 $4.925,00
1.000 $8.75 $8.750,00
ℹ️ Alle Preise sind in USD

SPC5601PEF0MLL6 Übersicht

The NXP SPC5601PEF0MLL6 is a 32-bit Power Architecture microcontroller from the MPC56xx Qorivva family, integrating an e200z0h core running at 64 MHz with 192 KB of embedded Flash and 12 KB of SRAM, housed in a 100-pin LQFP (14x14 mm) package rated for -40C to +125C automotive-grade operation.

A 32-bit MCU (microcontroller unit) is a single-chip computer that combines a processor core, program and data memory, and a rich set of on-chip peripherals. Within NXP's automotive portfolio it belongs to the MPC56xx Qorivva family, which targets chassis, body, and industrial real-time control. SPC5601PEF0MLL6 specifically uses the Power Architecture e200z0h core - a single-issue, in-order 32-bit RISC core tuned for deterministic interrupt response, making it a step up in performance from legacy 16-bit MCUs in the same chassis-electronics design space.

Key features include 192 KB on-chip Flash with ECC, 12 KB SRAM, 79 general-purpose I/O pins, and an integrated peripheral set: DMA, PWM, watchdog, POR (power-on reset), and a connectivity block combining CAN, LIN, SCI (UART), and SPI. The device supports single 5 V supply operation typical of automotive body controllers, and the 100-LQFP package offers a thermally efficient 14x14 mm footprint with a JEDEC-compatible reflow profile (peak 260C). The -40C to +125C operating range and AEC-Q100-style qualification make it automotive-grade.

Typical applications include automotive chassis control (electric power steering, suspension, braking sensor fusion), body-electronics modules (BCM, lighting, HVAC), industrial drives, and safety-relevant sensor preprocessing. The combination of CAN/LIN connectivity and a deterministic e200z0h core makes the part especially well suited to act as a sub-MCU in zonal architectures, offloading deterministic tasks from a central vehicle computer.

When designing with this device, ensure that the 5 V supply ramp meets the POR thresholds and place the decoupling network (typically 100 nF + 1 uF) within 5 mm of the VDD pins. Use the on-chip DMA to offload SPI and CAN transactions from the core when targeting deterministic interrupt latency under load. Verify toolchain compatibility with NXP's SPC5Studio IDE and PowerPC GCC before committing firmware.

Drop-in-Alternativen für SPC5601PEF0MLL6 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.

Varianten dieser Serie

Modelle derselben Serie, die drop-in-kompatibel sind mit SPC5601PEF0MLL6 (gleiche Bauform und Footprint) – abweichend in Connectivity, Core Processor, RAM Size, Core Size, Maximum Clock Frequency.

NXP Semiconductors
Connectivity: CANbus, I2C, LINbus, SCI, SPI
Core Size: 32-Bit
Vergleichen mit SPC5601PEF0MLL6 →
NXP Semiconductors
RAM Size: 20 KB
Core Size: 32-bit
Maximum Clock Frequency: 64 MHz
Vergleichen mit SPC5601PEF0MLL6 →
NXP Semiconductors
Connectivity: CANbus, EBI/EMI, LINbus, SCI, SPI
Core Processor: e200z4 Power Architecture
RAM Size: 192 KB
Vergleichen mit SPC5601PEF0MLL6 →
NXP Semiconductors
Connectivity: FlexRay
Core Processor: e200z4 (Power Architecture)
Core Size: 32-bit
Vergleichen mit SPC5601PEF0MLL6 →

Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:

SPC5602BF2MLL6

✅ Drop-In
NXP Semiconductors
📦 100-LQFP
e200z0h (Power Architecture) · 32-Bit · 64 MHz · 256KB (256K x 8) · FLASH · CANbus, I2C, LINbus, SCI, SPI · DMA, POR, PWM, WDT · 79

✓ Auf Lager

$5.59 / Stück

Datenblatt ansehen →

SPC5644AF0MLU2

✅ Drop-In
NXP Semiconductors
📦 100-LQFP
e200z4 Power Architecture · 32-bit · 120 MHz · 4 MB (4M x 8) FLASH · 192 KB · 84 · CANbus, EBI/EMI, LINbus, SCI, SPI · DMA, POR, PWM, WDT

✓ Auf Lager

$12.5 / Stück

Datenblatt ansehen →

SPC5602BK0MLL6

✅ Drop-In
📦 100-LQFP
Same 100-LQFP Qorivva family part; vehicle-tailored memory configuration; pinout-compatible with SPC5601PEF0MLL6 for direct PCB reuse.

📋 Referenzalternative (nicht im Katalog)

SPC5746BSK1MKU2

✅ Drop-In
NXP Semiconductors
📦 100-LQFP
e200z4 (Power Architecture) · 32-bit · 1 (single core) · 120 MHz · 3 MB (3M x 8) · 384 kB · 10 bit, 12 bit · 129 I/O

✓ Auf Lager

$17.25 / Stück

Datenblatt ansehen →

SPC5601PEF0MLL6 Grenzwerte & elektrische Eigenschaften

Core Processor e200z0h (Power Architecture)
Core Size 32-Bit Single-Core
Core Architecture Power Architecture, single-issue, in-order
Speed (Max) 64 MHz
Program Memory Size (Flash) 192 KB (192K x 8)
RAM Size 12 KB
Connectivity CANbus, LINbus, SCI (UART), SPI
Peripherals DMA, POR, PWM, WDT (Watchdog)
Number of I/O 79
Gehäuse / Bauform 100-LQFP (14x14 mm)
Montageart Surface Mount
Terminal Form GULL WING
Peak Reflow Temperature 260C (JEDEC lead-free profile)
Betriebstemperaturbereich -40C to +125C
Grade Automotive Grade (AEC-Q100)
Series / Family MPC56xx Qorivva
RoHS-Status Compliant (lead-free per package datasheet)

SPC5601PEF0MLL6 100-lqfp (14x14 mm) Pinbelegungsleitfaden

Pinbelegung für SPC5601PEF0MLL6 (100-lqfp (14x14 mm)-Gehäuse). Dieser digitale IC umfasst GPIO, Kommunikationsschnittstellen (UART, SPI, I2C) und Versorgungspins. Alternative Pin-Funktionen und Konfigurationsoptionen entnehmen Sie dem Herstellerdatenblatt. Unverzichtbar für Embedded-System-Design und PCB-Layout.

Pinbelegungsdiagramm für SPC5601PEF0MLL6 im 100-lqfp (14x14 mm)-Gehäuse

Keine detaillierten Pinbelegungsdaten verfügbar für SPC5601PEF0MLL6.

Siehe die Datenblatt für die vollständige Pin-Konfiguration.

Typische Anwendungen

SPC5601PEF0MLL6 ist geeignet für 7 Anwendungs: Automotive Chassis Control Module, Body Control Module (BCM), Industrial Sensor Hub / Field I/O Node, Automotive LIN Slave Node, Battery Management Sub-Controller (Sub-MCU), Drone / UAV Flight Controller (Safety-Limited), HVAC Actuator Module.

🚗

Automotive Chassis Control Module

The SPC5601PEF0MLL6 fits automotive chassis modules - electric power steering, suspension, and brake sensor fusion - where deterministic interrupt response and CAN/LIN connectivity are mandatory. The e200z0h core at 64 MHz executes chassis-control loops with predictable timing, while the on-chip PWM block drives actuator references and the DMA offloads sensor-bus traffic without CPU stalls. The 100-LQFP package and -40C to +125C operating range support under-hood and chassis-mounted ECU placement, and 192 KB Flash accommodates bootloader plus communication stacks.

🚗

Body Control Module (BCM)

The SPC5601PEF0MLL6 is well matched to body-electronics modules controlling lighting, HVAC, mirrors, and wipers. Its CAN/LIN connectivity integrates directly with vehicle multiplexing networks, while 79 GPIO drive LEDs, relays, and switch inputs without external expanders. The 192 KB Flash is sized for typical BCM application code plus bootloader, and 12 KB SRAM is sufficient for stack and small diagnostic buffers. The 5 V supply tolerance typical of the MPC56xx family simplifies design versus lower-voltage rails used elsewhere.

🏭

Industrial Sensor Hub / Field I/O Node

For industrial sensor hubs and field I/O nodes, the SPC5601PEF0MLL6 supplies the deterministic compute, RS232/RS485-class SCI communications, and PWM outputs required for closed-loop control and instrumentation aggregation. Its 64 MHz e200z0h core handles multi-rate sampling loops comfortably, while the on-chip DMA moves SPI-burst sensor data without interrupting control tasks. The -40C to +125C operating range supports deployment inside unshielded industrial cabinets; 79 GPIO often eliminates the need for an external I/O expander.

🚗

Automotive LIN Slave Node

The SPC5601PEF0MLL6 is a natural fit for LIN-bus slave nodes in window lifters, seat controllers, and mirror modules, where cost and footprint dominate. Its integrated SCI block drives LIN through an external transceiver, the PWM block directly controls motors, and the watchdog timer supports the LIN-specified fault-detection timing. The 100-LQFP's 14x14 mm footprint is appropriate for distributed zonal ECUs, and 192 KB Flash supports ISO 17987 LIN conformance plus diagnostic routines.

⚡

Battery Management Sub-Controller (Sub-MCU)

In zonal battery-management architectures, the SPC5601PEF0MLL6 acts as a sub-MCU performing cell-balancing and local monitoring before forwarding aggregated telemetry over CAN to a central BMS host. The e200z0h core's deterministic interrupt handling ensures precise cell-voltage sampling windows, while DMA offloads SPI ADC reads. The 192 KB Flash stores look-up tables and balancing algorithms, and 12 KB SRAM holds sample buffers between transmissions.

✈️

Drone / UAV Flight Controller (Safety-Limited)

For cost- and safety-limited UAV flight controllers and tethered-drone ESCs, the SPC5601PEF0MLL6 offers the deterministic timing, automotive-grade temperature range, and PWM channels required for brushless motor control. Its 64 MHz e200z0h core runs classic PID loops at kilohertz rates, and the on-chip DMA minimizes jitter on sensor-bus reads. Designers targeting FAA-relevant safety cases should however verify the part's qualification status for the chosen UAV category and consider higher-end SPC57 or Aurix parts for level-A failure coverage.

🏭

HVAC Actuator Module

The SPC5601PEF0MLL6 serves as a tightly integrated HVAC actuator controller, driving blower motors and damper servos via PWM while reading temperature and pressure inputs via SPI/ADC. Its 79 GPIO support multiple airflow sensors and mode-position feedback switches without external multiplexers. AEC-Q100 automotive qualification and the -40C to +125C operating range cover cabin and underhood HVAC placements, and 192 KB Flash accommodates both legacy and modern CAN-based HVAC command sets.

Zusammenfassung der empfohlenen Produkte

What is the operating temperature range of SPC5601PEF0MLL6?
The SPC5601PEF0MLL6 operates across -40C to +125C (junction), per NXP product information and the MPC56xx Qorivva family datasheet. This wide automotive-grade range makes it suitable for under-hood, chassis-mounted, and harsh industrial environments where commercial-grade 0C to +70C parts would derate or fail. Designers must still budget self-heating: at 64 MHz the core dissipation is modest but stacked I/O switching can elevate junction temperature inside an enclosed ECU.
How much Flash and RAM does the SPC5601PEF0MLL6 have?
The SPC5601PEF0MLL6 integrates 192 KB of on-chip Flash with ECC and 12 KB of SRAM. According to the NXP product page, the 192 KB is sized for typical chassis and body firmware including bootloader, communication stacks (CAN/LIN), and application logic; the 12 KB SRAM is sufficient for stacks and small buffers but is the tightest resource when adding Ethernet or large diagnostic buffers. Plan firmware partitioning to fit code+constants comfortably under 192 KB with margin for OTA or future features.
What core does the SPC5601PEF0MLL6 use and at what speed?
The SPC5601PEF0MLL6 uses NXP's e200z0h core - a 32-bit Power Architecture single-issue, in-order core - and runs at up to 64 MHz. The e200z0h is widely deployed across the MPC56xx family and is supported by NXP's SPC5Studio IDE and the GNU PowerPC toolchain. Deterministic interrupt response is the principal design benefit versus Cortex-M cores when firmware budgets rely on hard timing.
Where can I download the SPC5601PEF0MLL6 datasheet PDF?
The official NXP datasheet for SPC5601PEF0MLL6 is hosted on the NXP product page at https://www.nxp.com/part/SPC5601PEF0MLL6. Secondary mirror PDFs (for reference only, not authoritative) are also indexed on DigChip and abc-semi. Always cross-check pinout, errata, and electrical characteristics against the NXP-hosted revision before PCB or firmware release.
What package is the SPC5601PEF0MLL6 supplied in?
The SPC5601PEF0MLL6 is supplied in a 100-lead LQFP (Low-profile Quad Flat Package) measuring 14x14 mm with gull-wing leads, per the Vyrian and NXP package data. This automotive-standard, JEDEC-compatible footprint uses a 260C lead-free reflow profile and supports existing 100-LQFP PCB layouts from the MPC56xx ecosystem, easing second-source qualification.
Is the SPC5601PEF0MLL6 AEC-Q100 qualified?
Yes. According to NXP and DigiKey listings, the SPC5601PEF0MLL6 is part of NXP's MPC56xx Qorivva automotive MCU family, AEC-Q100 qualified for chassis and body-electronics deployments. Automotive-grade qualification means the part has been characterized for the temperature, vibration, and EMC stresses of vehicle environments - request the full PPAP/AEC-Q100 documentation package from NXP for safety-critical designs.
What is the SPC5601PEF0MLL6 pinout in the 100-LQFP?
The 100-LQFP pinout follows the standard MPC56xx Qorivva 100-pin assignment and is documented in the NXP datasheet (See the official NXP datasheet linked from https://www.nxp.com/part/SPC5601PEF0MLL6). Functions include multiple VDD/VSS pairs, JTAG/NMI on dedicated pins, CAN/LIN/SPI/UART alternate-function mapping, PWM channels, ADC inputs, and GPIO. Always refer to the current datasheet revision for the alternate-function matrix and signal-integrity notes.
What integrated peripherals does the SPC5601PEF0MLL6 include?
The SPC5601PEF0MLL6 integrates DMA, POR (power-on reset), PWM, and a hardware watchdog (WDT), per DigiKey and abc-semi listings. Connectivity includes CANbus, LINbus, SCI (UART), and SPI. This peripheral mix is targeted at deterministic body and chassis control: CAN/LIN for vehicle networking, PWM for actuator or motor drive, DMA to offload high-speed SPI bursts, and WDT for ASIL-relevant fault recovery.
How much does the SPC5601PEF0MLL6 cost?
As of 2026-10-19, Heisener lists a unit price around USD 13.23 at qty 1 for the SPC5601PEF0MLL6, with distributor pricing varying across DigiKey, Mouser, Newark, and Octopart depending on quantity break. Volume pricing is typically negotiated; for production runs over a few thousand units request a direct quote from NXP authorized distributors to confirm lead time and factory allocation.
Is the SPC5601PEF0MLL6 in stock today?
Stock for the SPC5601PEF0MLL6 varies by distributor: DigiKey and Mouser pages allow real-time stock checks, and Heisener reported approximately 5,760 pieces in stock. Because automotive microcontrollers can swing on allocation, check live inventory across at least two authorized distributors and confirm factory lead time before scheduling production orders.
What is the lead time for SPC5601PEF0MLL6 orders?
According to Heisener's listing of 2026-10-19, SPC5601PEF0MLL6 lead time is to be confirmed with an estimated delivery window of roughly Jun 24 - Jun 29. Authorized distributors (DigiKey, Mouser, Newark) typically publish live lead times; for production volumes request a direct factory quote through NXP or a franchised distributor to lock allocation.
SPC5601PEF0MLL6 vs SPC5602BF2MLL6 - which is better for chassis control?
The SPC5601PEF0MLL6 and SPC5602BF2MLL6 both belong to NXP's MPC56xx Qorivva family and share the e200z0h core architecture for body and chassis control. The SPC5602BF2MLL6 family members typically offer more Flash/RAM than the SPC5601, so choose SPC5602BF2MLL6 if your firmware exceeds 192 KB Flash or 12 KB SRAM. If your code fits comfortably within SPC5601's 192 KB / 12 KB envelope, prefer the SPC5601 to control cost and conserve qualification effort.
Can SPC5601PEF0MLL6 be replaced by a cross-brand alternative?
There is no single true drop-in cross-brand equivalent for the SPC5601PEF0MLL6 because the e200z0h Power Architecture core, on-chip peripheral set, and NXP-specific alternate-function pinout are not replicated identically elsewhere. Comparable cross-brand parts (e.g., Infineon Aurix TC2xx or Renesas RH850) require firmware rewrite and PCB rework. For drop-in replacement stay within NXP's MPC56xx family - the SPC5602BF2MLL6 and other pin-compatible Qorivva variants.
When should I choose the SPC5601PEF0MLL6 over a higher-end MPC56xx part?
Choose the SPC5601PEF0MLL6 over higher-end MPC56xx parts when your firmware fits within 192 KB Flash and 12 KB RAM, your application does not require hardware integrity checking beyond the on-chip ECC, and cost is a primary constraint. The SPC5601 is the cost-optimized choice for body controllers, simple chassis sensor nodes, and LIN-attached sub-modules where the deterministic e200z0h core is sufficient. Step up to SPC5604, SPC5606, or SPC56AP parts for higher Flash/RAM, lockstep cores, or ASIL-D capability.
What is the best drop-in replacement for SPC5601PEF0MLL6?
The best drop-in replacement for SPC5601PEF0MLL6 is a same-family NXP MPC56xx Qorivva part in the same 100-LQFP package with at least 192 KB Flash - for example, SPC5602BF2MLL6-family variants that share pinout. These alternatives preserve the e200z0h core, on-chip peripherals, and footprint, allowing PCB and firmware reuse. Cross-brand parts from Infineon or Renesas are not drop-in and require redesign.
What toolchain supports the SPC5601PEF0MLL6?
The SPC5601PEF0MLL6 is supported by NXP's SPC5Studio IDE (Eclipse-based) and the GNU PowerPC toolchain (GCC), per NXP's MPC56xx documentation. Commercial options include HighTec GCC, Green Hills MULTI, and iSystem winIDEA debug probes. Confirm that your chosen compiler version is on NXP's validated toolchain list before committing to a firmware release cycle.
What are the key specifications engineers should know about the SPC5601PEF0MLL6?
Key specifications of the SPC5601PEF0MLL6: 32-bit e200z0h Power Architecture core; 64 MHz CPU clock; 192 KB on-chip Flash with ECC; 12 KB SRAM; 79 GPIO; CAN, LIN, SCI, SPI connectivity; integrated DMA, PWM, WDT, POR; 100-LQFP (14x14 mm) package; -40C to +125C operating range; AEC-Q100 automotive grade; 5 V single supply. Designers should treat this as the cost-optimized entry of the MPC56xx Qorivva family for chassis and body networks.

Technische Referenzdaten für SPC5601PEF0MLL6 – Vergleich, Designhinweise und Compliance-Informationen.

Auswahlhilfe

Choose the SPC5601PEF0MLL6 when you need a 32-bit Power Architecture MCU for an automotive body or chassis module and your firmware fits within 192 KB Flash and 12 KB SRAM. Its e200z0h core at 64 MHz delivers deterministic interrupt timing that chassis and BCM firmware rely on, while the 100-LQFP 14x14 mm package supports existing MPC56xx PCB layouts. If your code exceeds 192 KB Flash or you need ASIL-D capability, move up to SPC5602BF2MLL6 or SPC5746BSK1MKU2 respectively. For a 16-bit automotive alternative, the MC9S12DT128MPVE remains serviceable but trades off performance and available peripherals. For industrial-only deployments outside automotive thermal/vibration stress, an ARM Cortex-M Kinetis part may be more cost-effective.

Vergleich mit Alternativen

Parameter Dieses Produkt SPC5602BF2MLL6 SPC5644AF0MLU2 SPC5602BK0MLL6 SPC5746BSK1MKU2
Package 100-LQFP (14x14 mm) 100-LQFP - same 100-LQFP - same 100-LQFP - same 100-LQFP - same
Brand NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors NXP Semiconductors
Core e200z0h (Power Architecture) e200z0h (Power Architecture) e200z4 (Power Architecture, higher-perf) e200z0h (Power Architecture) e200z4 (Power Architecture, lockstep)
Speed (Max) 64 MHz 64 MHz 60-80 MHz 64 MHz Up to 200 MHz class
Flash Size 192 KB Larger Flash in family Larger Flash Comparable in MPC56xx family Multi-MB Flash tier
RAM Size 12 KB Larger SRAM in family Larger SRAM Comparable in MPC56xx family Multi-MB SRAM tier
Operating Temperature -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C
Connectivity CAN, LIN, SCI, SPI CAN, LIN, SCI, SPI CAN, LIN, SCI, SPI, FlexRay CAN, LIN, SCI, SPI CAN-FD, LIN, FlexRay, Ethernet
Grade Automotive (AEC-Q100) Automotive (AEC-Q100) Automotive (AEC-Q100) Automotive (AEC-Q100) Automotive ASIL-D capable
Unit Price (qty 1, USD) 13.23 Higher tier (more Flash) Higher tier Comparable tier Substantially higher (premium tier)

Wichtigste Unterscheidungsmerkmale

  • Lowest-cost MPC56xx 100-LQFP option with e200z0h core (vs. SPC5602BF2MLL6)
  • Predictable deterministic core for hard real-time loops (vs. SPC5746BSK1MKU2)
  • Power Architecture ecosystem with mature automotive toolchain (vs. MC9S12DT128MPVE (HCS12 family))

Designhinweise

Decouple the VDD and VDDA pins with 100 nF + 1 uF ceramic capacitor pairs placed within 5 mm of the package pins, matching NXP MPC56xx layout guidelines. The POR block is sensitive to slow or noisy supply ramps; ensure VDD reaches the nominal value within the published rise-time spec, otherwise the device may enter or exit reset unpredictably. Use a bulk 10 uF or larger tantalum/polymer cap at the regulator output for transient load events on motor-driven rails.

Route the CAN/LIN/SPI buses with characteristic impedances appropriate for the ECU harness (typically 100-120 ohm differential for CAN). Keep oscillator traces short and symmetric, place the crystal near the XTAL pins with a guard ring tied to ground, and avoid routing switching signals across the analog supply islands. Maintain a continuous ground plane under the MCU and stitch vias around the LQFP perimeter for thermal dissipation.

The SPC5601PEF0MLL6's 12 KB SRAM is the tightest resource when adding Ethernet or large diagnostic buffers - plan firmware partitioning to leave headroom. Do not assume that 'AEC-Q100 automotive grade' equals 'ASIL-D capable'; the SPC5601 family supports QM / ASIL-A safety levels only - use SPC5746 or Aurix TC2xx for ASIL-C / D. Verify the toolchain (SPC5Studio, GCC, Green Hills) version is on NXP's validated list before committing to production firmware.

At 64 MHz with typical automotive IO toggling, the SPC5601PEF0MLL6 dissipation in the 100-LQFP is modest, but inside a sealed ECU without airflow the junction temperature can rise significantly. Apply the JEDEC EIA/JESD51 thermal resistance values for 100-LQFP and derate to ambient + 20C; consider adding copper pours on the PCB top layer to spread heat and improve Theta_JA. For harsh environments validate with a thermocouple or thermal camera during functional test.

Compliance-Informationen

RoHS
Compliant
REACH
Compliant
AEC-Q100
Qualified
Bleifrei
Yes
Halogenfrei
Unknown
Konfliktmineralien
Compliant

AEC-Q100 qualified per NXP automotive-grade family positioning per https://www.nxp.com/part/SPC5601PEF0MLL6; however the SPC5601 family supports QM / ASIL-A safety levels only. Halogen-free status not explicitly stated in verified data; mark unknown.

Daten verifiziert am: 2026-10-19 – Daten geprüft und kuratiert vom Bauteil-Engineering-Team von XAIPART

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