1EDN7136UXTSA1 vs 2ED21064S06JXUMA1 Comparaison
Comparaison détaillée côte à côte de 1EDN7136UXTSA1 par Infineon et 2ED21064S06JXUMA1 par Infineon. Comparez les spécifications clés, les paramètres électriques, le conditionnement, le statut de cycle de vie, les prix et la disponibilité pour déterminer le meilleur composant pour vos exigences de conception.
Comparaison des spécifications
| Paramètre | 1EDN7136UXTSA1 | 2ED21064S06JXUMA1 |
|---|---|---|
| Marque | Infineon | Infineon |
| Catégorie | Power MOSFET Drivers | Power MOSFET Drivers |
| Statut du cycle de vie | Actif | Actif |
| Statut du stock | In Stock | In Stock |
| Prix unitaire (USD) | $0,74 | $0,85 |
| Fonction | High-side / Low-side gate driver IC | High-Side and Low-Side Gate Driver |
| Driven Device Type | GaN HEMT, N-channel MOSFET | — |
| Nombre de sorties | 2 (high-side and low-side) | — |
| Peak Source Current | 1 A | — |
| Peak Sink Current | 2 A | — |
| Driver Supply Voltage (Max) | 200 V | — |
| Logic Supply Voltage (VCC) | [DATA_NEEDED: VCC range] | — |
| Input Type | Truly Differential Input (TDI) | — |
| Active Miller Clamp | Yes (integrated) | — |
| Under-Voltage Lockout (UVLO) | Yes (driver supply and logic input) | — |
| Propagation Delay (Typ) | [DATA_NEEDED: propagation delay value] | — |
| Plage de température de fonctionnement | -40 C to +150 C | — |
| Boîtier | TSNP-6 with exposed pad (PG-VSON-1) | PG-DSO-14 (14-pin SOIC) |
| Type de montage | Surface Mount | Surface Mount |
| Statut RoHS | Compliant | ROHS3 Compliant |
| Lead-Free | Yes | — |
| Sans halogène | Yes (per Infineon product family convention) | — |
| Niveau MSL | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL level] |
| Configuration | — | Half-Bridge (2 outputs, non-inverting) |
| Topologie | — | High-Side, Low-Side with integrated bootstrap diode |
| Maximum Offset / Boot Voltage | — | 650 V |
| Supply Voltage (VCC) | — | 10 V to 20 V |
| Source Current (typical) | — | 0.29 A |
| Sink Current (typical) | — | 0.7 A |
| Rise Time (typical) | — | [DATA_NEEDED: rise time] |
| Fall Time (typical) | — | [DATA_NEEDED: fall time] |
| Propagation Delay (typical) | — | 100 ns |
| Channel-to-Channel Delay Match | — | [DATA_NEEDED: channel-to-channel delay match] |
| Under-Voltage Lockout | — | Yes (both channels) |
| Bootstrap Diode | — | Integrated |
| Input Logic Compatibility | — | 3.3 V / 5 V CMOS |
| Température de fonctionnement | — | -40C to +125C |
| Negative Gate Drive Robustness | — | -0.7 V |