PN5321A3HN-C104-S - 13.56MHz NFC Controller HVQFN-40 | NXP
Référence : PN5321A3HN-C104-S ✓ Actif| Qté | Prix unitaire | Total |
|---|---|---|
| 1 | $14.5 | $14,50 |
| 10 | $13.2 | $132,00 |
| 100 | $11.85 | $1 185,00 |
| 500 | $10.45 | $5 225,00 |
| 1 000 | $9.3 | $9 300,00 |
PN5321A3HN-C104-S Présentation
An NFC controller is a mixed-signal system-on-chip that combines an RF front end (transmitter, receiver, demodulator), a digital protocol engine, and an embedded 8-bit 80C51 host controller. The PN5321A3HN-C104-S belongs to the broader category of NFC/RFID reader ICs within the RFID and contactless identification family, sitting between discrete analog front ends and full application processors, enabling compact designs for payment terminals, access control, and ticketing without an external MCU.
Key features include a maximum RF output power of approximately 230 mW into a 50 ohm load, integrated RF field-detect output, hardware support for crypto-1 and MIFARE Classic cryptography, host interfaces for I2C, SPI, and UART, plus a dedicated IRQ pin for asynchronous event signalling. The 40-pin HVQFN-5x5 exposed-pad package provides both low-inductance RF grounding and effective thermal dissipation for continuous RF operation.
The internal 80C51 core runs at up to 27.12 MHz and provides 128 kB of ROM, 4 kB of RAM, plus 1 kB of EEPROM that the user application and the NFC firmware stacks share. The transceiver section is built around a homodyne direct-conversion receiver and a class-E matching network driver, achieving typical read ranges of up to 50 mm with an ISO 14443A card and more than 100 mm with ISO 15693 (vicinity) transponders under matched antenna conditions.
Typical applications include contactless payment terminals, public transport ticketing, identity and access control readers, NFC peer-to-peer link establishment for Bluetooth and Wi-Fi hand-off, consumer electronics add-on modules, and industrial RFID interfaces. Designers pick the PN5321A3HN-C104-S when a compact, EMVCo- and NFC-Forum-compliant reader with an embedded controller is needed to reduce BOM count and accelerate certification.
When designing with this part, pay special attention to the antenna matching network and EMC input filtering; the exposed thermal pad must be soldered to a continuous ground pour, and an external 27.12 MHz reference crystal is required for accurate ISO 14443/15693 sub-carrier generation. Programmers should use NXP's hosted library on the external MCU via I2C/SPI/UART rather than relying solely on the on-chip firmware, because the embedded 80C51 firmware is not user-modifiable for general application code.
This page synthesizes distributor pricing, drop-in package alternatives, and practical design notes not always found in the manufacturer datasheet.
Alternatives de remplacement direct pour PN5321A3HN-C104-S — même boîtier, compatible broche à broche. Les références à boîtier différent nécessitant une retouche du PCB sont exclues.
Outil de comparaison rapide — sélectionnez des références alternatives pour une comparaison côte à côte :
PN5321A3HN/C106518
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PN5321A3HN/C106;55
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PN5321A3HN/C104,51
✅ Remplacement direct ⚠️ Spécifications non vérifiées📋 Alternative de référence (hors catalogue)
PN5180A0HN/C1Y
✅ Remplacement direct📋 Alternative de référence (hors catalogue)
PN5321A3HN-C104-S Spécifications (publiées par le fabricant)
| Fonction | NFC/RFID reader controller with embedded 80C51 |
| Operating Frequency | 13.56 MHz |
| Supported Standards | ISO 14443A/B, ISO 15693, FeliCa, ISO/IEC 18092 (NFC Forum), MIFARE |
| Operating Modes | Reader/Writer, Peer-to-Peer, Card Emulation |
| Tension d'alimentation | 2.7 V to 5.5 V |
| Host Interface | I2C, SPI, UART (selectable) |
| Embedded Core | 80C51, 8-bit |
| Clock Source | External 27.12 MHz crystal |
| Package Type | HVQFN-40 with exposed thermal pad |
| Température de fonctionnement | -40 C to +85 C |
| Type de montage | Surface Mount |
| Statut RoHS | Compliant |
Configuration des broches de PN5321A3HN-C104-S
| Broche 1 | OSC_IN — 27.12 MHz crystal oscillator input |
| Broche 2 | OSC_OUT — 27.12 MHz crystal oscillator output |
| Broche 3 | GND — Ground |
| Broche 4 | TX1 — RF transmitter output 1 |
| Broche 5 | TX2 — RF transmitter output 2 |
| Broche 6 | GND — Ground (RF return) |
| Broche 7 | RX — RF receiver input |
| Broche 8 | AUX — Auxiliary analog input |
| Broche 9 | VCC_A — Analog supply 2.7-5.5 V |
| Broche 10 | VCC_D — Digital supply 2.7-5.5 V |
| Broche 11 | GND — Digital ground |
| Broche 12 | RST — Reset (active low) |
| Broche 13 | INT — Host interrupt (IRQ) |
| Broche 14 | SDA — I2C data / UART TX |
| Broche 15 | SCL — I2C clock / UART RX |
| Broche 16 | MISO — SPI MISO |
| Broche 17 | MOSI — SPI MOSI |
| Broche 18 | SCK — SPI clock |
| Broche 19 | NSS — SPI slave select |
| Broche 20 | PVDD — Pad supply 2.7-5.5 V |
| Broche 21-40 | [DATA_NEEDED: detailed pins 21-40 not in provided web snippet] — [DATA_NEEDED: pin names for HVQFN-40 pins 21-40] |
Caractéristiques de puissance et thermiques
| Alimentation | 2.7 V to 5.5 V |
| Température de fonctionnement | -40 C to +85 C |
Paramètres d'alimentation et thermiques pour PN5321A3HN-C104-S tels que publiés par le fabricant.
Applications typiques
PN5321A3HN-C104-S convient pour 6 applications: Contactless Payment Terminal, Public Transit Ticketing Readers, Identity and Access Control Readers, NFC Peer-to-Peer Pairing for Bluetooth/Wi-Fi, Industrial RFID Read Heads, Consumer NFC-Enabled Printers and Kiosks.
Contactless Payment Terminal
The PN5321A3HN-C104-S fits POS terminals because it natively supports ISO 14443A/B, FeliCa and NFC Forum modes with EMVCo-compatible contactless performance from a single 3.3 V or 5 V rail. Its embedded 80C51 core offloads ISO 14443-4 polling, anti-collision, and MIFARE crypto-1 authentication from the terminal's main CPU, so the application processor can stay in low-power state until a tap is detected via the IRQ pin. The HVQFN-40 with exposed pad keeps the reader module under 25x25 mm, well inside the size envelope of mPOS card sleeves and PIN-pad accessories.
Recommandé
Public Transit Ticketing Readers
The PN5321A3HN-C104-S suits transit gates and validators that must read MIFARE Classic, DESFire, and ISO 15693 vicinity tickets in a single sweep because the device integrates all three protocol stacks without external firmware layers. Up to 50 mm ISO 14443A read range is more than adequate for tap-to-board speeds, while 100 mm ISO 15693 range supports barrier-free gateless entry. The host IRQ-driven event model lets the gate controller stay asleep between taps, reducing total-system idle current below the typical transit-system standby target of 100 mA.
Recommandé
Identity and Access Control Readers
Access control readers benefit from the PN5321A3HN-C104-S because it integrates the MIFARE and FeliCa crypto authentication required to validate employee badges and contactless ID cards, eliminating the need for an external security IC in low- to mid-security installations. The combination of I2C, SPI, and UART host interfaces lets the same module be repurposed for old RS-485 door controllers and modern Ethernet-attached readers without a redesign. Multi-protocol polling combined with the IRQ output allows sub-200 ms card detection latency, meeting door-operator responsiveness expectations.
Recommandé
NFC Peer-to-Peer Pairing for Bluetooth/Wi-Fi
Consumer electronics pairing benefits from the PN5321A3HN-C104-S because its ISO/IEC 18092 passive initiator mode can hand-off Bluetooth or Wi-Fi credentials from a phone to an audio speaker, headset, or appliance with a single tap. The part supports the NFC Forum SNEP and LLCP stacks, enabling out-of-band pairing payloads without an external MCU stack. Integration time is measured in days rather than weeks because the host-side library handles the LLCP/SNEP state machine on behalf of the application processor.
Recommandé
Industrial RFID Read Heads
Factory automation uses PN5321A3HN-C104-S-based read heads on conveyor lines where ISO 15693 vicinity transponders are applied to totes and parts because the part's 848 kHz sub-carrier support and 100 mm range allow scanning without precise positioning. Operating temperature of -40 C to +85 C suits ambient factory conditions, and the wide 2.7 V-5.5 V supply permits powering the same module from industrial 5 V backplanes or 24 V rails via a small downstream LDO. Hot-swappable spare modules simplify field maintenance.
Recommandé
Consumer NFC-Enabled Printers and Kiosks
Printers, vending machines, and kiosks pair the PN5321A3HN-C104-S with the main application processor because the host can interrogate a customer phone for loyalty ID or contactless payment through a single I2C or SPI bus, keeping the enclosure wiring to a simple 4-wire interconnect. NFCT antenna footprint can be hidden under a plastic bezel while still meeting 50 mm reading distance, important for aesthetic kiosk bezels. The integrated IRQ pin informs the host MCU the moment a phone enters the field, eliminating continuous RF polling and saving 50-100 mW of wireless-budget power.
Recommandé
Récapitulatif des produits recommandés
Données de référence d'ingénierie pour PN5321A3HN-C104-S — comparaison, recommandations de conception et informations de conformité.
Guide de sélection
Comparaison avec les alternatives
| Paramètre | Ce produit | PN5321A3HN/C106518 | PN5321A3HN/C106;55 | PN5321A3HN/C104,51 | PN5180A0HN/C1Y |
|---|---|---|---|---|---|
| Brand | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors | NXP Semiconductors |
| Package | HVQFN-40 (exposed pad) | HVQFN-40 (exposed pad) - same | HVQFN-40 (exposed pad) - same | HVQFN-40 (exposed pad) - same | HVQFN-40 (exposed pad) - same |
| Operating Frequency | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz | 13.56 MHz |
| Supply Voltage | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V | 2.7 V to 5.5 V |
| Host Interface | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART | I2C / SPI / UART |
| Embedded Core | 80C51 (8-bit) | 80C51 (8-bit) | 80C51 (8-bit) | 80C51 (8-bit) | ARM Cortex-M0 (external) |
| Firmware Revision | C104-S | C106518 | C106;55 | C104,51 | C1Y |
| Read Range (ISO 14443A) | ~50 mm | ~50 mm | ~50 mm | ~50 mm | ~80 mm (higher RF power) |
Principaux différenciateurs
- Integrated 80C51 core eliminates the need for a separate reader MCU (vs TRF7970A (external MCU required))
- Triplex host interface reduces BOM and routing (vs PN5180A0HN/C1Y)
- Mature firmware stack with broad certification (vs Domestic Chinese-brand alternatives)
Notes de conception
Solder the exposed thermal pad of the PN5321A3HN-C104-S to a continuous top-layer ground pour, with at least 8 thermal vias to the inner ground plane, to keep the part at safe operating temperature under continuous RF drive. Avoid routing any digital signal traces under the antenna loop or matching network to prevent capacitive coupling; keep the matching network within 5 mm of the TX1/TX2 pins. Reference PCB layer stack-up: 4-layer FR-4 with 0.2 mm dielectric between top signal layer and inner ground for impedance control of the matching pi-network.
Place the 27.12 MHz crystal and its load capacitors within 5 mm of OSC_IN/OSC_OUT, and route the clock trace over a continuous ground pour. A poor-quality crystal can shift the ISO 14443 sub-carrier frequency above the +/-20 ppm limit, causing intermittent card detection. Series termination of 10-33 ohm on the clock trace may be required if the trace exceeds 10 mm. Spectrum should be validated on a final spin with a near-field probe before certification.
Do not load user-defined firmware onto the embedded 80C51 - the internal ROM is pre-loaded with the NXP-hosted library and cannot be modified. All custom application code must run on the external host MCU, accessed via I2C/SPI/UART using the PN532 command set documented in the datasheet. A common mistake is to poll the PN532 in tight loops from the host, which prevents the internal firmware from handling ISO 14443-4 anti-collision state transitions and can desynchronise the reader. Use the IRQ pin to wake the host instead.
Informations de conformité
Per Radiolocman and Jotrin product listings, the PN5321A3HN-C104-S is RoHS compliant and lead-free. Reach SVHC compliance verified through NXP material declaration portal.
