EP3SE260H780C2N vs EP3SE260H780C3N तुलना
विस्तृत दोनों ओर की तुलना EP3SE260H780C2N द्वारा Intel और EP3SE260H780C3N द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
Intel
EP3SE260H780C3N - Stratix III E FPGA, 255K LE, 780-BGA | Intel / Altera
EP3SE260H780C3N ✓ सक्रियविशेषता तुलना
| पैरामीटर | EP3SE260H780C2N | EP3SE260H780C3N |
|---|---|---|
| ब्रांड | Intel | Intel |
| श्रेणी | FPGA & CPLD | FPGA & CPLD |
| लाइफसाइकिल स्थिति | अंतिम बार खरीदें | सक्रिय |
| Series | Stratix III E | Stratix® III E |
| Logic Elements | 255,000 | — |
| LABs / CLBs | 10,200 | — |
| Total RAM Bits | 16,672,768 | — |
| User I/O Count | 488 | — |
| Number of Transceivers | [DATA_NEEDED: transceiver count] | — |
| Core Voltage | 0.9 V | — |
| पैकेज | 780-BGA FCBGA | 780-BBGA, FCBGA (H780) |
| माउंटिंग प्रकार | Surface Mount | Surface Mount |
| ऑपरेटिंग तापमान रेंज | Commercial (0C to +85C) | — |
| Speed Grade | C2 | — |
| MSL स्तर | 3 (168 hours) | — |
| Reflow Peak Time Max | 40 s | — |
| RoHS स्थिति | [DATA_NEEDED: rohs status] | Compliant (lead-free 'N' suffix) |
| Lead-Free | [DATA_NEEDED: lead-free] | — |
| Package Code | BGA | — |
| Terminal Form | Ball | — |
| Number of Terminals | 780 | — |
| Process Node | 40 nm | — |
| Logic Elements (LE) | — | 255,000 |
| Embedded Memory (bits) | — | 16,672,768 |
| Number of LABs/CLBs | — | 10,200 |
| User I/Os | — | 488 |
| Number of Pins / Balls | — | 780 |
| ऑपरेटिंग तापमान | — | 0 °C to +85 °C (C grade, commercial) |
| Process Technology | — | 40 nm CMOS |
| Maximum Core Frequency | — | [DATA_NEEDED: maximum core frequency MHz] |
| Supply Voltage (VCCINT) | — | [DATA_NEEDED: VCCINT nominal V] |
| Transceivers | — | [DATA_NEEDED: number of embedded transceivers and max data rate] |
| DSP Blocks | — | [DATA_NEEDED: number of DSP blocks and precision] |
| नमी संवेदनशीलता स्तर (MSL) | — | [DATA_NEEDED: MSL level per JEDEC J-STD-020] |
| Configuration Method | — | SRAM-based, configured via JTAG / passive / active serial / fast passive parallel |
| Design Toolchain | — | Altera Quartus II (legacy); Intel Quartus Prime |