EPC2L120 vs EPC2L120N तुलना
विस्तृत दोनों ओर की तुलना EPC2L120 द्वारा Altera और EPC2L120N द्वारा Intel. मुख्य विशेषताओं, इलेक्ट्रिकल पैरामीटर, पैकेजिंग, चक्र स्थिति, मूल्यांकन और उपलब्धता को तुलना करके अपनी डिजाइन की आवश्यकताओं के लिए सबसे अच्छा घटक निर्धारित करें。
विशेषता तुलना
| पैरामीटर | EPC2L120 | EPC2L120N |
|---|---|---|
| ब्रांड | Altera | Intel |
| श्रेणी | Memory ICs | FPGA & CPLD |
| लाइफसाइकिल स्थिति | NRND | Obsolete |
| मेमोरी प्रकार | Configuration PROM (Flash-based) | — |
| Density | 120 Kbit | — |
| Configuration Interface | Serial, FPGA-targeted | — |
| Operating Voltage | 2.7 V to 3.6 V (3.3 V typ) | — |
| In-System Programmability | Yes (IEEE 1149.1 JTAG) | — |
| पैकेज | PLCC-20 | 84-pin PLCC (J-Lead) |
| Compatible FPGAs | Altera Cyclone, Cyclone II, APEX-series | — |
| ऑपरेटिंग तापमान | -40 C to +85 C | [DATA_NEEDED: industrial temp range] |
| CONF_DONE Output | Open-drain, wire-OR capable | — |
| Data Retention | 20 years (per Altera datasheet family) | — |
| Program/Erase Cycles | 100 cycles minimum | — |
| माउंटिंग प्रकार | Surface Mount | — |
| RoHS स्थिति | unknown | unknown |
| Lead-Free | unknown | — |
| Family | EPC2 (Enhanced Configuration) | EPC2 (Enhanced Configuration Device) |
| Device Type | — | Configuration Device for SRAM-based LUT FPGAs |
| Manufacturer | — | Intel (formerly Altera) |
| Memory Capacity | — | 165,888 bits (400,000 gates equivalent) |
| Operating Voltage (VCCIO) | — | 2.7 V to 3.6 V |
| 5V Tolerance | — | Yes (5V-tolerant I/O) |
| Configuration Clock (FPP) | — | Up to 66 MHz |
| Configuration Clock (PS) | — | Up to 33 MHz |
| Internal Oscillator | — | 8 MHz with programmable divider |
| JTAG Interface | — | IEEE Std 1149.1 compliant, ISP support |
| Programming Cycles | — | 100,000 erase/program cycles |
| Sector Erase Time | — | [DATA_NEEDED: typical sector erase time] |
| Configuration Schemes | — | FPP, PS, JTAG, daisy chain |
| Supported FPGA Families | — | Cyclone, APEX, FLEX, Mercury, ACEX, Stratix |