EPC1LC20-WCEC52 vs EPC1L20 Perbandingan

Perbandingan bersamaan detil EPC1LC20-WCEC52 dari Altera dan EPC1L20 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPC1LC20-WCEC52 EPC1L20
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Aktif
Tipe Memori OTP Configuration PROM (Anti-fuse) OTP Configuration PROM (Flash)
Ukuran Memori 1 Mbit (1,048,576 bits) 1 Mbit
Organisasi 212,942 x 1 bit —
Antarmuka Serial (Altera FPP/PS configuration protocol) Serial / FPP configuration + JTAG (IEEE 1149.1)
Configuration Clock (DCLK) 8 MHz maximum —
Supply Voltage (VCC) 3.3 V —
I/O Voltage Tolerance 5.0 V (FPGA interface) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Programmability One-Time Programmable (OTP) One-Time Programmable (OTP)
Suhu Kerja -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
Paket 20-pin PLCC (J-lead, through-hole, 9x9 mm) 20-pin PLCC (9x9 mm)
Package Mounting Through-hole (also accepts PLCC socket) —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Compatible FPGA Families Cyclone, Stratix, APEX, ACEX, MAX series —
Programming Interface JTAG (IEEE Std 1149.1) ISP —
Jumlah Pin 20 —
Status Lingkungan Hidup Obsolete (recommended replacement: EPCQ family or newer serial config devices) —
Configuration Clock (max) — 8 MHz
Flash Access Time — 90 ns (approx.)
Max Read Bandwidth — 160 Mbps (16-bit DQ bus)
Tegangan Pemuat — 3.3 V (typical)
Tipe Mounting — Through-Hole / Socket
JTAG / ISP Support — Yes (IEEE 1149.1)
Compatible FPGA Series — Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families

Spek dan Sumber

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