EPC1LC20-WCEC52 vs EPC1L20 Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPC1LC20-WCEC52 disebabkan oleh Altera dan EPC1L20 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPC1LC20-WCEC52 EPC1L20
Merek Altera Altera
Kategori Memory ICs Memory ICs
Status Lingkungan Hidup Obsolete Aktif
Jenis Ingatan OTP Configuration PROM (Anti-fuse) OTP Configuration PROM (Flash)
Saiz Ingatan 1 Mbit (1,048,576 bits) 1 Mbit
Organisasi 212,942 x 1 bit —
Antaramuka Serial (Altera FPP/PS configuration protocol) Serial / FPP configuration + JTAG (IEEE 1149.1)
Configuration Clock (DCLK) 8 MHz maximum —
Supply Voltage (VCC) 3.3 V —
I/O Voltage Tolerance 5.0 V (FPGA interface) —
In-System Programmability Yes (IEEE 1149.1 JTAG) —
Programmability One-Time Programmable (OTP) One-Time Programmable (OTP)
Suhu Operasi -40C to +85C (industrial) [DATA_NEEDED: operating temperature range]
Kemasan 20-pin PLCC (J-lead, through-hole, 9x9 mm) 20-pin PLCC (9x9 mm)
Package Mounting Through-hole (also accepts PLCC socket) —
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Compatible FPGA Families Cyclone, Stratix, APEX, ACEX, MAX series —
Programming Interface JTAG (IEEE Std 1149.1) ISP —
Kiraan Pin 20 —
Status Lingkungan Hidup Obsolete (recommended replacement: EPCQ family or newer serial config devices) —
Configuration Clock (max) — 8 MHz
Flash Access Time — 90 ns (approx.)
Max Read Bandwidth — 160 Mbps (16-bit DQ bus)
Tegangan Pemberi Arus — 3.3 V (typical)
Jenis Pemasangan — Through-Hole / Socket
JTAG / ISP Support — Yes (IEEE 1149.1)
Compatible FPGA Series — Stratix, Cyclone, APEX, FLEX, ACEX, LUT-based families

Laporan Datasheet & Sumber

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