EPM5128GC2 vs EPM5128LC2 Perbandingan

Perbandingan bersamaan detil EPM5128GC2 dari Altera dan EPM5128LC2 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Altera
EPM5128LC2 EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 - 128-Macrocell MAX 5000 CPLD, 45ns, 5V | Altera

EPM5128LC2 ⚠ Waktu Beli Terakhir

Perbandingan Spesifikasi

Parameter Umum EPM5128GC2 EPM5128LC2
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Waktu Pembelian Terakhir
Family MAX 5000 MAX 5000
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Macro Cells 128 —
Usable Gates 2.5K —
Logic Array Blocks (LABs) 8 (16 macro cells each) 8
Maximum Internal Frequency 50 MHz —
Supply Voltage VCC 5 V —
I/O Pins 64 —
Dedicated Inputs 16 —
Paket Ceramic PGA (GC, windowed) PGA (Pin Grid Array, ceramic)
Programmable Flip-Flop Modes D / T / JK / SR (selectable) —
Architecture AND/OR plane + programmable macro cell + PIA —
Process Technology CMOS EPROM CMOS EPROM
Reprogrammability UV-erasable (windowed ceramic package) —
Suhu Kerja [DATA_NEEDED: operating temperature range] -40 C to +85 C (extended commercial)
Status RoHS [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Configuration Memory On-chip EPROM (no external boot device) On-chip EPROM (non-volatile)
Jumlah Pin [DATA_NEEDED: total PGA pin count] —
Macrocells — 128
Interconnect — Programmable Interconnect Array (PIA)
Global Clock Inputs — 1 dedicated
Propagation Delay (tPD) — 45 ns
Supply Voltage (VCC) — 5 V
Boundary Scan — JTAG / IEEE 1149.1
Tipe Mounting — Through-Hole / Socketed

Spek dan Sumber

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