EPM5128GC2 vs EPM5128LC2 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5128GC2 sa pamamagitan ng Altera at EPM5128LC2 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5128GC2 | EPM5128LC2 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Huling Pagbili |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 |
| Maximum Internal Frequency | 50 MHz | — |
| Supply Voltage VCC | 5 V | — |
| I/O Pins | 64 | — |
| Dedicated Inputs | 16 | — |
| Packhaging | Ceramic PGA (GC, windowed) | PGA (Pin Grid Array, ceramic) |
| Programmable Flip-Flop Modes | D / T / JK / SR (selectable) | — |
| Architecture | AND/OR plane + programmable macro cell + PIA | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Reprogrammability | UV-erasable (windowed ceramic package) | — |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (extended commercial) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EPROM (no external boot device) | On-chip EPROM (non-volatile) |
| Bilang ng Pin | [DATA_NEEDED: total PGA pin count] | — |
| Macrocells | — | 128 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | — | 1 dedicated |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 5 V |
| Boundary Scan | — | JTAG / IEEE 1149.1 |
| Uri ng Pagpapasok | — | Through-Hole / Socketed |