EPM5128GC2 vs EPM5128LC2 比較
詳細並排比較 EPM5128GC2 由 Altera 與 EPM5128LC2 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5128GC2 | EPM5128LC2 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | 最後購買 |
| Family | MAX 5000 | MAX 5000 |
| Device Type | EPLD (Erasable Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Macro Cells | 128 | — |
| Usable Gates | 2.5K | — |
| Logic Array Blocks (LABs) | 8 (16 macro cells each) | 8 |
| Maximum Internal Frequency | 50 MHz | — |
| Supply Voltage VCC | 5 V | — |
| I/O Pins | 64 | — |
| Dedicated Inputs | 16 | — |
| 封裝 | Ceramic PGA (GC, windowed) | PGA (Pin Grid Array, ceramic) |
| Programmable Flip-Flop Modes | D / T / JK / SR (selectable) | — |
| Architecture | AND/OR plane + programmable macro cell + PIA | — |
| Process Technology | CMOS EPROM | CMOS EPROM |
| Reprogrammability | UV-erasable (windowed ceramic package) | — |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (extended commercial) |
| RoHS 狀態 | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EPROM (no external boot device) | On-chip EPROM (non-volatile) |
| 腳位數 | [DATA_NEEDED: total PGA pin count] | — |
| Macrocells | — | 128 |
| Interconnect | — | Programmable Interconnect Array (PIA) |
| Global Clock Inputs | — | 1 dedicated |
| Propagation Delay (tPD) | — | 45 ns |
| Supply Voltage (VCC) | — | 5 V |
| Boundary Scan | — | JTAG / IEEE 1149.1 |
| 安裝類型 | — | Through-Hole / Socketed |