EPM9560RC208-13 vs EPM9560RC208-15 Perbandingan
Perbandingan bersamaan detil EPM9560RC208-13 dari Altera dan EPM9560RC208-15 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.
Perbandingan Spesifikasi
| Parameter Umum | EPM9560RC208-13 | EPM9560RC208-15 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Device Family | MAX 9000 EPLD | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 20 | — |
| User I/O Pins | 208 | — |
| Paket | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Package Code | RC208 | — |
| Speed Grade | -13 (13 ns pin-to-pin) | -15 (15 ns pin-to-pin) |
| Propagation Delay (tPD) | 13 ns | — |
| Frekuensi Bawah Maximum | 125 MHz | — |
| Tegangan Pemuat | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Rentang Suhu Kerja | 0C to +70C (commercial) | — |
| Tipe Mounting | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Level MSL | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Suhu Kerja | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |