EPM9560RC208-13 vs EPM9560RC208-15 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RC208-13 disebabkan oleh Altera dan EPM9560RC208-15 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9560RC208-13 | EPM9560RC208-15 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Device Family | MAX 9000 EPLD | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 gates |
| Logic Array Blocks (LABs) | 20 | — |
| User I/O Pins | 208 | — |
| Kemasan | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Package Code | RC208 | — |
| Speed Grade | -13 (13 ns pin-to-pin) | -15 (15 ns pin-to-pin) |
| Propagation Delay (tPD) | 13 ns | — |
| Frekuensi Klock Maksimum | 125 MHz | — |
| Tegangan Pemberi Arus | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Gambaran Suhu Operasi | 0C to +70C (commercial) | — |
| Jenis Pemasangan | Surface Mount | Surface Mount |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Lead-Free Status | [DATA_NEEDED: lead-free status] | — |
| Aras MSL | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Device Type | — | EEPROM-based Complex Programmable Logic Device (CPLD) |
| Macro Cells | — | 560 macro cells |
| Pin-to-Pin Delay | — | 15 ns |
| Counter Speed | — | 117.6 MHz |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Suhu Operasi | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: number of I/O pins] |
| Logic Array Blocks | — | [DATA_NEEDED: number of logic array blocks] |
| Architecture | — | Third-generation Multiple Array MatriX (MAX) |