EPM5032DM vs EPM5032DI-20 비교
다음의 상세 나란히 비교: EPM5032DM 제조: Intel 및 EPM5032DI-20 제조: Intel. 주요 사양, 전기적 파라미터, 패키징, 수명 주기 상태, 가격 및 재고를 비교하여 설계 요구 사항에 가장 적합한 부품을 결정하십시오.
사양 비교
| 파라미터 | EPM5032DM | EPM5032DI-20 |
|---|---|---|
| 브랜드 | Intel | Intel |
| 카테고리 | FPGA & CPLD | FPGA & CPLD |
| 수명 주기 상태 | Obsolete | Obsolete |
| 재고 상태 | In Stock | In Stock |
| 단가 (USD) | $15.90 | $8.75 |
| Device Family | MAX 5000 | — |
| Macrocells | 32 | 32 |
| Propagation Delay (tPD) | 25 ns | — |
| Usable Gates | 600 to 1000 (typical) | — |
| Logic Inputs | 32 | — |
| Process Technology | CMOS EEPROM | — |
| 패키지 | CDIP-28 (ceramic windowed DIP, 28-pin) | Ceramic DIP-20 (windowed, UV-erasable) |
| Supply Voltage (VCC) | 5 V (typical) | — |
| Standby Current | [DATA_NEEDED: ICC standby current] | — |
| 동작 온도 | -55C to +125C (military/extended, ceramic package) | Industrial (per 'I' suffix) |
| Programming Technology | UV-erasable (windowed) EEPROM | — |
| Logic Function | Combinational and registered (synchronous) | — |
| Output Polarity | Programmable | — |
| Program Retention | Non-volatile (EEPROM) | — |
| 실장 유형 | Through-hole (DIP) | — |
| RoHS 상태 | Non-compliant (ceramic DIP with UV window) | [DATA_NEEDED: RoHS compliance status for ceramic DIP variant] |
| Lead-Free | No (ceramic DIP contains lead) | [DATA_NEEDED: lead-free status] |
| Family | — | MAX 5000 (Altera legacy EPLD) |
| Architecture | — | CMOS PAL-type EPLD with PIA |
| Dedicated Inputs | — | 7 |
| Bidirectional I/O Pins | — | 16 |
| Product Terms | — | 320 (maximum) |
| Flip-Flops | — | 16 (one per macrocell) |
| 최대 클록 주파수 | — | 62.5 MHz |
| Pin-to-Pin Delay | — | 20 ns (speed grade -20) |
| Programming | — | UV-erasable CMOS, JEDEC fuse file |
| Development Tool | — | Altera MAX+PLUS II (legacy) |