EPM5032DM vs EPM5032DI-20 Comparação

Comparação detalhada lado a lado de EPM5032DM por Intel e EPM5032DI-20 por Intel. Compare especificações principais, parâmetros elétricos, encapsulamento, status do ciclo de vida, preços e disponibilidade para determinar o melhor componente para os requisitos do seu projeto.

Comparação de especificações

Parâmetro EPM5032DM EPM5032DI-20
Marca Intel Intel
Categoria FPGA & CPLD FPGA & CPLD
Status do ciclo de vida Obsolete Obsolete
Status do estoque In Stock In Stock
Preço unitário (USD) $15,90 $8,75
Device Family MAX 5000 —
Macrocells 32 32
Propagation Delay (tPD) 25 ns —
Usable Gates 600 to 1000 (typical) —
Logic Inputs 32 —
Process Technology CMOS EEPROM —
Encapsulamento CDIP-28 (ceramic windowed DIP, 28-pin) Ceramic DIP-20 (windowed, UV-erasable)
Supply Voltage (VCC) 5 V (typical) —
Standby Current [DATA_NEEDED: ICC standby current] —
Temperatura de operação -55C to +125C (military/extended, ceramic package) Industrial (per 'I' suffix)
Programming Technology UV-erasable (windowed) EEPROM —
Logic Function Combinational and registered (synchronous) —
Output Polarity Programmable —
Program Retention Non-volatile (EEPROM) —
Tipo de montagem Through-hole (DIP) —
Status RoHS Non-compliant (ceramic DIP with UV window) [DATA_NEEDED: RoHS compliance status for ceramic DIP variant]
Lead-Free No (ceramic DIP contains lead) [DATA_NEEDED: lead-free status]
Family — MAX 5000 (Altera legacy EPLD)
Architecture — CMOS PAL-type EPLD with PIA
Dedicated Inputs — 7
Bidirectional I/O Pins — 16
Product Terms — 320 (maximum)
Flip-Flops — 16 (one per macrocell)
Frequência máxima de clock — 62.5 MHz
Pin-to-Pin Delay — 20 ns (speed grade -20)
Programming — UV-erasable CMOS, JEDEC fuse file
Development Tool — Altera MAX+PLUS II (legacy)

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