EP2AGX95EF29C6G - 89K LE Arria II GX FPGA, 780-FCBGA | Intel
부품 번호: EP2AGX95EF29C6G ✓ 활성| 수량 | 단가 | 합계 |
|---|---|---|
| 1 | $685 | $685.00 |
| 10 | $625 | $6,250.00 |
| 100 | $565 | $56,500.00 |
| 500 | $510 | $255,000.00 |
| 1,000 | $465 | $465,000.00 |
EP2AGX95EF29C6G 개요
What is an FPGA? A Field-Programmable Gate Array is a semiconductor device containing an array of configurable logic blocks (CLBs), programmable interconnects, and dedicated hardened IP such as transceivers, block RAM, DSP blocks, and PLLs. Unlike fixed-function ASICs, FPGAs are reprogrammed in the field to implement arbitrary digital logic, hardware accelerators, or interface bridges. FPGAs occupy a mid-position between software CPUs (flexible, slower) and ASICs (fast, expensive, non-reprogrammable) in the broader digital logic hierarchy: programmable logic device -> FPGA -> programmable logic IC -> logic semiconductor -> integrated circuit.
Key features of the EP2AGX95EF29C6G include up to 12 transceivers, dedicated hardware multipliers, 8 PLLs, and embedded memory blocks with ECC support. The Arria II GX architecture delivers high serial bandwidth at low power, with the EF29 package variant targeting applications requiring transceiver-rich I/O at moderate logic density.
Typical applications include high-speed serial protocol bridging (PCI Express Gen1/Gen2, Serial RapidIO, Gigabit Ethernet), video broadcast and processing, wireless baseband, industrial test equipment, and defense/aerospace signal processing. The 780-FCBGA footprint provides sufficient I/O for multi-channel designs while keeping PCB layer count manageable.
When designing with this device, ensure the Quartus II design tool supports the EP2AGX95 family and verify power-sequencing requirements for the 0.9 V core rail. Decoupling and thermal management are critical due to the BGA package's thermal resistance and the transceiver power consumption.
This page synthesizes distributor pricing, drop-in alternatives, and design notes that complement the manufacturer datasheet.
드롭인 대체품: EP2AGX95EF29C6G — 동일 패키지, 핀 호환. PCB 재작업이 필요한 다른 패키지 부품은 제외됩니다.
이 시리즈의 변형
다음과 드롭인 호환되는 동일 시리즈 모델: EP2AGX95EF29C6G (동일 폼 팩터 및 풋프린트) — 차이점: Package, Speed Grade, Transceivers, Operating Temperature, Number of Transceivers.
빠른 비교 도구 — 나란히 비교할 대체 부품을 선택하십시오:
EP2AGX95EF29C5G
✅ 드롭인✓ 재고 있음
$1305 / 개
데이터시트 보기 →EP2AGX95EF29C4G
✅ 드롭인✓ 재고 있음
$980 / 개
데이터시트 보기 →EP2AGX95EF29C3N
✅ 드롭인✓ 재고 있음
$171 / 개
데이터시트 보기 →EP2AGX95EF29C5N
✅ 드롭인✓ 재고 있음
$990 / 개
데이터시트 보기 →EP2AGX95EF29C4N
✅ 드롭인✓ 재고 있음
$855 / 개
데이터시트 보기 →EP2AGX125EF29C6G
✅ 드롭인✓ 재고 있음
$1495 / 개
데이터시트 보기 →EP2AGX95EF29C6G 최대 정격 & 전기적 특성
| Family | Arria II GX |
| Logic Elements | 89,178 |
| Embedded Memory | 4,494 Kbits |
| Number of I/O | 372 |
| Supply Voltage - Core | 0.87 V to 0.93 V |
| 동작 온도 | 0C to +85C (TJ) |
| 패키지 / 케이스 | 780-BBGA, FCBGA |
| Package Code | HBGA (FC-FBGA) |
| Package Width | 29 mm |
| 실장 유형 | Surface Mount |
| Process Technology | 40 nm |
| Speed Grade | 6 |
| LABs | 3,747 |
| Transceivers | Up to 12 (3.75 Gbps) |
| PLLs | 8 |
| RoHS 상태 | Compliant |
EP2AGX95EF29C6G 핀 구성
| 핀 A1 | I/O Bank 8A — General purpose I/O, Bank 8A |
| 핀 A2 | I/O Bank 8A — General purpose I/O, Bank 8A |
| 핀 B1 | GND — Ground reference |
| 핀 B2 | VCCIO8A — I/O supply voltage, Bank 8A |
| 핀 C1 | I/O Bank 8A — General purpose I/O, Bank 8A |
| 핀 C2 | I/O Bank 8A — General purpose I/O, Bank 8A |
| 핀 D1 | GXB_TX_p — Transceiver differential transmit positive |
| 핀 D2 | GXB_TX_n — Transceiver differential transmit negative |
| 핀 E1 | GXB_RX_p — Transceiver differential receive positive |
| 핀 E2 | GXB_RX_n — Transceiver differential receive negative |
| 핀 F1 | VCC — Core supply voltage (0.9V nominal) |
| 핀 F2 | VCC — Core supply voltage (0.9V nominal) |
| 핀 G1 | GND — Ground reference |
| 핀 G2 | GND — Ground reference |
| 핀 H1 | I/O Bank 3A — General purpose I/O, Bank 3A |
| 핀 H2 | I/O Bank 3A — General purpose I/O, Bank 3A |
| 핀 J1 | VCCIO3A — I/O supply voltage, Bank 3A |
| 핀 J2 | I/O Bank 3A — General purpose I/O, Bank 3A |
| 핀 K1 | nCONFIG — Configuration control (active low) |
| 핀 K2 | MSEL0 — Configuration mode select 0 |
일반적인 애플리케이션
EP2AGX95EF29C6G 적합 용도: 7 애플리케이션s: PCI Express Bridge / Endpoint, Wireless Baseband Processing, Video Broadcast and Processing, Industrial Test and Measurement Equipment, Defense and Aerospace Signal Processing, Serial Protocol Bridging and Conversion, High-Speed Data Acquisition Systems.
PCI Express Bridge / Endpoint
The EP2AGX95EF29C6G's integrated transceivers support PCI Express Gen1 (2.5 Gbps) and Gen2 (5.0 Gbps) protocols natively via hard IP blocks. With 89,178 logic elements and 372 user I/Os, the device can implement root complex or endpoint functionality alongside custom application logic in a single chip. The Arria II GX hard PCIe IP eliminates soft logic overhead, freeing fabric for protocol-aware DMA engines or protocol tunneling. Engineers typically allocate 5,000-10,000 LE for PCIe hard IP wrapper logic and dedicate four transceiver channels to PCIe x4 interfaces.
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Wireless Baseband Processing
The EP2AGX95EF29C6G delivers sufficient DSP block density and transceiver count for mid-range wireless baseband designs, including LTE picocell baseband, small-cell LTE, and CPRI-to-baseband conversion. The device's 12 transceivers support CPRI rates up to 3.072 Gbps with multiple antenna carriers aggregated. Fabricated on the 40nm low-power process, the Arria II GX variant provides better power efficiency than the Arria II GZ for thermally constrained outdoor small-cell enclosures. Designers can implement PHY-layer DSP functions using dedicated 18x18 multipliers.
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Video Broadcast and Processing
The EP2AGX95EF29C6G supports uncompressed video transport over SDI (Serial Digital Interface) at rates up to 3 Gbps, leveraging the integrated transceivers. With 4,494 Kbits of embedded memory, the device buffers video frames while processing functions like format conversion, scaling, and overlay generation run in parallel on the 89K logic elements. The 780-FBGA package provides sufficient I/O for multi-channel SDI input plus parallel video bus interfaces. Professional broadcast equipment vendors use this FPGA for video routers, multiviewers, and signal processors.
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Industrial Test and Measurement Equipment
The EP2AGX95EF29C6G's high-speed transceivers support protocols like Serial RapidIO, Gigabit Ethernet, and Aurora for connecting to digitizers, DACs, and high-speed ADCs in test instrumentation. With 372 user I/Os, the device provides ample LVDS pairs for parallel ADC/DAC interfaces at sample rates up to 500 MSPS. Logic-analyzer and protocol-analyzer products use this FPGA for state sequencing, pattern generation, and protocol decoding. The 0C to +85C junction temperature range suits bench-top and laboratory-grade equipment.
추천
Defense and Aerospace Signal Processing
The EP2AGX95EF29C6G is suitable for defense applications including radar signal processing, electronic warfare subsystems, and secure communications. The 89K logic elements implement real-time FFT engines, channelizers, and digital down-converters while transceivers handle wideband analog-to-digital data streaming. Note that defense applications typically require the industrial temperature variant (EP2AGX95EF29I5G) for -40C to +100C operation. Conduction-cooled ruggedized modules use this FPGA for sensor processing in airborne and naval platforms.
추천
Serial Protocol Bridging and Conversion
The EP2AGX95EF29C6G bridges between incompatible serial protocols like Serial RapidIO to PCI Express, Aurora to Ethernet, or custom backplane protocols to standard interfaces. With 12 transceivers and 89K logic elements, the device can simultaneously handle multiple protocol conversions while maintaining line-rate throughput. Storage systems use this FPGA for SAS/SATA expander functions, while telecommunications equipment uses it for legacy-to-modern protocol migration. The Arria II GX hard IP blocks accelerate protocol processing.
추천
High-Speed Data Acquisition Systems
The EP2AGX95EF29C6G interfaces to high-speed ADCs and DACs via LVDS or serial JESD204B links, suitable for medical imaging, scientific instrumentation, and radar digitizers. The 12 transceivers support multiple JESD204B lanes at up to 3.75 Gbps, connecting to modern high-channel-count converters. Embedded memory blocks buffer acquisition windows while fabric logic performs real-time DSP. The 780-FBGA package's 372 I/Os accommodate wide parallel data buses plus control and synchronization signals required in multi-board systems.
추천
추천 제품 요약
엔지니어링 참조 데이터: EP2AGX95EF29C6G — 비교, 설계 지침 및 규정 준수 정보.
선택 가이드
대체품과의 비교
| 파라미터 | 이 제품 | EP2AGX95EF29C5G | EP2AGX95EF29C4G | EP2AGX95EF29C3N | EP2AGX125EF29C6G |
|---|---|---|---|---|---|
| Package | 780-FBGA (29 mm) | 780-FBGA (29 mm) - same | 780-FBGA (29 mm) - same | 780-FBGA (29 mm) - same | 780-FBGA (EF29) - same family |
| Brand | Intel (formerly Altera) | Intel | Intel | Intel | Intel |
| Logic Elements | 89,178 | 89,178 - same | 89,178 - same | 89,178 - same | 118,182 (+33%) |
| Speed Grade | C6 (fastest) | C5 | C4 | C3 (slowest) | C6 |
| Transceivers | Up to 12 | Up to 12 | Up to 12 | Up to 12 | Up to 12 |
| Operating Temperature | 0C to +85C | 0C to +85C | 0C to +85C | 0C to +85C | 0C to +85C |
| Process Technology | 40 nm | 40 nm | 40 nm | 40 nm | 40 nm |
주요 차별점
- Highest speed grade in the EF29 package family (vs EP2AGX95EF29C5G)
- Integrated high-speed transceivers in EF29 package (vs EP2AGX95DF29C6G)
- Right-sized logic density for mid-range applications (vs EP2AGX125EF29C6G)
설계 노트
The EP2AGX95EF29C6G requires multiple power rails: 0.9V core (VCC), 1.1V or 1.2V auxiliary (VCCAUX), and per-bank VCCIO supplies (typically 1.5V, 1.8V, 2.5V, or 3.3V depending on I/O standard). Power sequencing requires VCCIO and VCCAUX to ramp before or simultaneously with VCC to prevent I/O latch-up. Intel recommends using the EN5364 or EN63A0 power regulator family with proper SoftStart. Estimated total power for typical PCIe Gen2 x4 design with 50% logic utilization: 5-7W with transceivers active.
The 780-FBGA package has junction-to-ambient thermal resistance (theta_JA) of approximately 12 C/W with appropriate thermal via array and heatsink. Estimated: at 7W total power dissipation and 25C ambient, junction temperature rises to 109C (TJ = 25C + 7W x 12 C/W). This is within the 85C TJ limit only if ambient is below 73C. For industrial temperature operation, derate power consumption to under 5W or use conduction cooling.
The 780-ball FBGA package requires a 1.0mm ball pitch PCB layout with microvia technology (stacked or staggered vias). Use a 6-layer PCB minimum with dedicated ground and power planes. Place decoupling capacitors within 100 mils of each power pin group. Transceiver channels require 100-ohm differential impedance routing with length matching within 5 mils for PCIe Gen2 compliance. Thermal via array (0.3mm pitch) beneath the BGA is essential for heat dissipation.
Do not confuse the EP2AGX95EF29C6G (Arria II GX with transceivers) with the EP2AGX95DF29C6G (Arria II GX without transceivers). Both share the same package family but different die. The EF29 package has GXB transceiver balls routed out, while the DF29 package reuses those balls as regular I/O. Verify your design's transceiver requirements match the EF29 variant. Additionally, ensure Quartus II version 11.0 or later is used for proper timing analysis of the C6 speed grade.
규정 준수 정보
RoHS compliant per distributor listings. The 'G' suffix in EP2AGX95EF29C6G indicates lead-free and RoHS-compliant. Not AEC-Q100 qualified - this is a commercial/industrial grade FPGA, not automotive qualified.