EP1810LI-45 vs EP1810JI-35 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EP1810LI-45 disebabkan oleh Rochester Electronics dan EP1810JI-35 disebabkan oleh Intel. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Rochester Electronics
EP1810LI-45 - Classic EPLD, 900 Gates, 48 Macrocells, 45ns, PQCC68 | Rochester Electronics (Altera)
EP1810LI-45 ✓ Aktif
Pengandingan Spesifikasi
| Parametr | EP1810LI-45 | EP1810JI-35 |
|---|---|---|
| Merek | Rochester Electronics | Intel |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Aktif | Obsolete |
| Product Type | EPLD (Erasable Programmable Logic Device) | — |
| Family | Altera Classic | — |
| Usable Gates | 900 | — |
| Macrocells | 48 | 48 |
| Maximum User I/O | 64 inputs / 48 outputs | — |
| Pin-to-Pin Logic Delay (tPD) | 45 ns | — |
| Counter Frequency (fCNT) | up to 100 MHz | — |
| Setup Time (tSU) | [DATA_NEEDED: setup time] | — |
| Technology | CMOS, UV-erasable EPROM configuration | — |
| Tegangan Pemberi Arus | 5 V | 5 V (typical classic EPLD) |
| Gambaran Suhu Operasi | -40 C to +85 C (Industrial, 'I' suffix) | — |
| Kemasan | 68-pin PLCC / PQCC68 (J-Lead) | 28-pin JLCC (J-leaded ceramic, windowed) |
| Logic Blocks | 12 LABs of 4 macrocells each | — |
| Configuration Memory | Non-volatile UV-erasable EPROM | — |
| Programming Method | Altera programming hardware with MAX+PLUS II / legacy tools | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance for ceramic windowed JLCC] |
| Manufacturer | Rochester Electronics (licensed continuation of Altera / Intel PSG Classic EPLD line) | — |
| Device Family | — | Classic EPLD |
| Logic Array Blocks | — | 8 LABs of 16 macrocells |
| Dedicated Inputs | — | 48 |
| Pin-to-Pin Propagation Delay (tPD) | — | 35 ns |
| Speed Grade | — | -35 |
| Process Technology | — | CMOS EPROM (UV-erasable) |
| Suhu Operasi | — | -40C to +85C (Industrial) |
| Programmability | — | UV-erase, windowed for lab reprogram |
| Jenis Pemasangan | — | Through-Hole (J-lead) |
| Aras MSL | — | [DATA_NEEDED: MSL rating] |
| Programming Interface | — | JEDEC fuse file via legacy programmer |