EPM5128JC vs EPM5064JC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5128JC disebabkan oleh Altera dan EPM5064JC disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5128JC EPM5064JC
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Product Family MAX 5000 —
Device Type EPLD / CPLD EPLD (Erasable PLD)
Macrocell Count 128 —
Propagation Delay (tPD) 35 ns —
Logic Elements Programmable AND/OR/XOR array —
Supply Voltage (VCC) 5 V (typical) 5 V (typical, 4.75 V - 5.25 V range)
Bilangan Pin 68 —
Package Type PLCC-68 (JLCC) ceramic, J-leaded —
Dedicated Inputs 8 —
User I/O Pins [DATA_NEEDED: user I/O pin count] —
Configuration Memory UV-erasable EPROM (windowed package) EPROM (UV-erasable window or OTP)
Programming Interface Altera MAX+PLUS II / A+PLUS / legacy programmer —
Suhu Operasi Commercial 0C to +70C [DATA_NEEDED: operating temperature grade]
Jenis Pemasangan Surface Mount (PLCC socket or solder) Surface Mount (socketed)
Boundary Scan JTAG IEEE 1149.1 (family feature) —
Process Technology CMOS EPROM —
Status RoHS [DATA_NEEDED: RoHS status - legacy part] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] [DATA_NEEDED: lead-free status]
Family — MAX 5000
Macrocells — 64
Usable Gates — 1,250 (approx.)
Logic Array Inputs — 36
Logic Array Outputs — 64
Kemasan — 68-pin PLCC (JEDEC)
I/O Logic Level — TTL / CMOS compatible
Pin-to-Pin Delay (tPD) — [DATA_NEEDED: specific tPD grade value]
Maximum Frequency (fMAX) — [DATA_NEEDED: fCNT grade value]
Aras MSL — [DATA_NEEDED: MSL rating]
Programming Tool — Altera MAX+PLUS II / Quartus II (legacy device support)

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