EPM51929C vs EPM5192-1LC Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM51929C disebabkan oleh Intel dan EPM5192-1LC disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM51929C EPM5192-1LC
Merek Intel Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Device Family MAX 5000 —
Device Type EPLD (Erasable Programmable Logic Device) CPLD (Complex Programmable Logic Device)
Architecture Multi-array matrix (PAL-based macrocells) —
Logic Density [DATA_NEEDED: usable gates] —
Number of Macrocells [DATA_NEEDED: macrocell count] —
Bilangan Pin [DATA_NEEDED: pin count] —
Package Type [DATA_NEEDED: package suffix - C denotes commercial temperature grade] —
Technology CMOS EPROM —
Programmability UV-erasable, JEDEC fuse map —
Suhu Operasi Commercial (0C to +70C) 0C to +70C (commercial)
Tegangan Pemberi Arus [DATA_NEEDED: VCC range] 5 V
Propagation Delay [DATA_NEEDED: tpd specification] —
Maximum Toggle Frequency [DATA_NEEDED: fmax] —
Jenis Pemasangan Surface Mount or Through-Hole (package dependent) Surface Mount
Status RoHS unknown Non-compliant (ceramic windowless package, lead-bearing termination)
Lead-Free unknown —
Aras MSL [DATA_NEEDED] —
Family — MAX 5000
Usable Gates — 3,750
Macrocells — 192
Logic Array Blocks (LABs) — 4
User I/O Pins — 64
Maximum Operating Frequency — 62.5 MHz
Propagation Delay (tpd) — [DATA_NEEDED: -1 speed grade tpd in ns]
Process Technology — UV EPROM, erasable windowless
Programmable Interconnect — PIA (Programmable Interconnect Array)
JTAG Boundary Scan — IEEE 1149.1 compliant
Kemasan — 64-pin Ceramic J-Lead Chip Carrier (LC)

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