EPM5192LC-35 vs EPM5192LC-2N Pengandingan

Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM5192LC-35 disebabkan oleh Altera dan EPM5192LC-2N disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.

Pengandingan Spesifikasi

Parametr EPM5192LC-35 EPM5192LC-2N
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Series MAX 5000 —
Family MAX 5000 CPLD MAX 5000
Logic Elements / Macrocells 192 macrocells —
Pin-to-Pin Delay (tPD) 35 ns —
Speed Grade -35 -2 (tPD approximately 25 ns)
Programmable Type UV-Erasable / OTP (EPROM-based) —
Package Type JLCC (J-Lead Ceramic Chip Carrier) LC (ceramic J-leaded, windowed UV-erasable package family)
Jenis Pemasangan Surface Mount Surface Mount (LC package)
Logic Voltage 5 V TTL-compatible I/O —
Suhu Operasi Commercial (0C to +70C) per LC suffix Commercial (0C to +70C) - inferred from speed-grade -2 designation
Programming Method Altera legacy programmer (EPROM-based) —
Architecture LAB-based with Programmable Interconnect Array (PIA) Programmable Logic Array (PLA) with global PIA
I/O Standard TTL —
Status RoHS Non-compliant (ceramic hermetic package) Compliant (per -N lead-free suffix)
Status Lingkungan Hidup Obsolete - last-time-buy stock only —
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) —
Macrocells — 192
Flip-Flops — 192
Logic Elements — 192 macrocells (PAL/GAL-style AND-OR array)
Propagation Delay (typical) — 25 ns
Tegangan Pemberi Arus — 5 V (typical)
Programmability — UV-erasable EPROM cell
Lead-Free — Yes (per -N suffix)
Programming Interface — Altera programming hardware (MAX+PLUS II / ByteBlaster compatible)

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