EPM5192LC-35 vs EPM5192LC-2N Ikinahambing

Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-35 sa pamamagitan ng Altera at EPM5192LC-2N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.

Pagsanggunian na paghahambing

Parametro EPM5192LC-35 EPM5192LC-2N
Brand Altera Altera
Kategorya FPGA & CPLD FPGA & CPLD
Katayuan ng Lifecycle Obsolete Obsolete
Series MAX 5000 —
Family MAX 5000 CPLD MAX 5000
Logic Elements / Macrocells 192 macrocells —
Pin-to-Pin Delay (tPD) 35 ns —
Speed Grade -35 -2 (tPD approximately 25 ns)
Programmable Type UV-Erasable / OTP (EPROM-based) —
Package Type JLCC (J-Lead Ceramic Chip Carrier) LC (ceramic J-leaded, windowed UV-erasable package family)
Uri ng Pagpapasok Surface Mount Surface Mount (LC package)
Logic Voltage 5 V TTL-compatible I/O —
Temperature na Operasyon Commercial (0C to +70C) per LC suffix Commercial (0C to +70C) - inferred from speed-grade -2 designation
Programming Method Altera legacy programmer (EPROM-based) —
Architecture LAB-based with Programmable Interconnect Array (PIA) Programmable Logic Array (PLA) with global PIA
I/O Standard TTL —
Tindminan RoHS Non-compliant (ceramic hermetic package) Compliant (per -N lead-free suffix)
Katayuan ng Lifecycle Obsolete - last-time-buy stock only —
Datasheet Document Altera MAX 5000 family datasheet (per alldatasheet.com) —
Macrocells — 192
Flip-Flops — 192
Logic Elements — 192 macrocells (PAL/GAL-style AND-OR array)
Propagation Delay (typical) — 25 ns
Volte ng Pagbibigay — 5 V (typical)
Programmability — UV-erasable EPROM cell
Lead-Free — Yes (per -N suffix)
Programming Interface — Altera programming hardware (MAX+PLUS II / ByteBlaster compatible)

Mga Datasheets at Resources

Tingnan ang Lahat ng mga Produkto Lumikha ng BOM Hilingin ang Kita