10CL006YE144I7G - Cyclone 10 LP FPGA 6K LE | Intel | 144-LQFP
MPN: 10CL006YE144I7G β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $19.95 | $19.95 |
| 10 | $17.85 | $178.50 |
| 100 | $15.4 | $1,540.00 |
| 500 | $12.95 | $6,475.00 |
| 1,000 | $11.2 | $11,200.00 |
Drop-in alternatives for 10CL006YE144I7G β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
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View Datasheet β10CL006YE144I7G Maximum Ratings & Electrical Characteristics
| Product Type | FPGA - Field Programmable Gate Array |
| Series | Cyclone 10 LP |
| Logic Elements (LEs) | 6,272 |
| Logic Array Blocks (LABs) | 392 |
| Total RAM Bits | 276,480 |
| M9K Memory Blocks | 15 |
| Embedded Multipliers (18x18) | 56 |
| PLLs | 6 |
| User I/O Pins | 88 |
| Package | 144-LQFP Exposed Pad (EQFP-144) |
| Core Voltage (VCCINT) | 1.0 V to 1.2 V |
| I/O Voltage (VCCIO) | 1.2 V to 3.3 V |
| Configuration Mode | JTAG, AS, PS, FPP |
| Operating Temperature | -40C to +100C (Industrial) |
| RoHS Status | Compliant |
10CL006YE144I7G Pin Configuration
| Pin 1 | I/O Bank 1A β User I/O (Bank 1A, VCCIO1A powered) |
| Pin 2 | GND β Ground |
| Pin 3 | I/O β User I/O |
| Pin 4 | I/O β User I/O |
| Pin 5 | I/O β User I/O |
| Pin 6 | I/O β User I/O |
| Pin 7 | VCCIO1A β I/O Bank 1A supply (1.2V-3.3V) |
| Pin 8 | I/O β User I/O |
| Pin 9 | I/O β User I/O |
| Pin 10 | GND β Ground |
| Pin 11 | I/O β User I/O |
| Pin 12 | I/O β User I/O |
| Pin 13 | I/O β User I/O |
| Pin 14 | I/O β User I/O |
| Pin 15 | VCCIO1B β I/O Bank 1B supply |
| Pin 16 | I/O β User I/O |
| Pin 17 | I/O β User I/O |
| Pin 18 | I/O β User I/O |
| Pin 19 | GND β Ground |
| Pin 20 | I/O β User I/O |
| Pin 21 | I/O β User I/O |
| Pin 22 | I/O β User I/O |
| Pin 23 | VCCIO2 β I/O Bank 2 supply |
| Pin 24 | I/O β User I/O |
| Pin 25 | I/O β User I/O |
| Pin 26 | I/O β User I/O |
| Pin 27 | GND β Ground |
| Pin 28 | I/O β User I/O |
| Pin 29 | I/O β User I/O |
| Pin 30 | I/O β User I/O |
| Pin 31 | I/O β User I/O |
| Pin 32 | VCCIO2 β I/O Bank 2 supply |
| Pin 33 | I/O β User I/O |
| Pin 34 | I/O β User I/O |
| Pin 35 | I/O β User I/O |
| Pin 36 | GND β Ground |
| Pin 37 | I/O β User I/O |
| Pin 38 | I/O β User I/O |
| Pin 39 | VCCIO3 β I/O Bank 3 supply |
| Pin 40 | I/O β User I/O |
| Pin 41 | I/O β User I/O |
| Pin 42 | I/O β User I/O |
| Pin 43 | GND β Ground |
| Pin 44 | I/O β User I/O |
| Pin 45 | I/O β User I/O |
| Pin 46 | I/O β User I/O |
| Pin 47 | I/O β User I/O |
| Pin 48 | VCCIO3 β I/O Bank 3 supply |
| Pin 49 | I/O β User I/O |
| Pin 50 | I/O β User I/O |
| Pin 51 | GND β Ground |
| Pin 52 | I/O β User I/O |
| Pin 53 | I/O β User I/O |
| Pin 54 | I/O β User I/O |
| Pin 55 | VCCIO4 β I/O Bank 4 supply |
| Pin 56 | I/O β User I/O |
| Pin 57 | I/O β User I/O |
| Pin 58 | I/O β User I/O |
| Pin 59 | GND β Ground |
| Pin 60 | I/O β User I/O |
| Pin 61 | I/O β User I/O |
| Pin 62 | I/O β User I/O |
| Pin 63 | I/O β User I/O |
| Pin 64 | VCCIO4 β I/O Bank 4 supply |
| Pin 65 | I/O β User I/O |
| Pin 66 | I/O β User I/O |
| Pin 67 | I/O β User I/O |
| Pin 68 | GND β Ground |
| Pin 69 | I/O β User I/O |
| Pin 70 | I/O β User I/O |
| Pin 71 | I/O β User I/O |
| Pin 72 | VCCIO5 β I/O Bank 5 supply |
| Pin 73 | I/O β User I/O |
| Pin 74 | I/O β User I/O |
| Pin 75 | I/O β User I/O |
| Pin 76 | GND β Ground |
| Pin 77 | I/O β User I/O |
| Pin 78 | I/O β User I/O |
| Pin 79 | I/O β User I/O |
| Pin 80 | I/O β User I/O |
| Pin 81 | VCCIO5 β I/O Bank 5 supply |
| Pin 82 | I/O β User I/O |
| Pin 83 | I/O β User I/O |
| Pin 84 | I/O β User I/O |
| Pin 85 | GND β Ground |
| Pin 86 | I/O β User I/O |
| Pin 87 | I/O β User I/O |
| Pin 88 | I/O β User I/O |
| Pin 89 | VCCIO6 β I/O Bank 6 supply |
| Pin 90 | I/O β User I/O |
| Pin 91 | I/O β User I/O |
| Pin 92 | I/O β User I/O |
| Pin 93 | GND β Ground |
| Pin 94 | I/O β User I/O |
| Pin 95 | I/O β User I/O |
| Pin 96 | I/O β User I/O |
| Pin 97 | I/O β User I/O |
| Pin 98 | VCCIO6 β I/O Bank 6 supply |
| Pin 99 | I/O β User I/O |
| Pin 100 | I/O β User I/O |
| Pin 101 | I/O β User I/O |
| Pin 102 | GND β Ground |
| Pin 103 | I/O β User I/O |
| Pin 104 | I/O β User I/O |
| Pin 105 | I/O β User I/O |
| Pin 106 | VCCIO7 β I/O Bank 7 supply |
| Pin 107 | I/O β User I/O |
| Pin 108 | I/O β User I/O |
| Pin 109 | I/O β User I/O |
| Pin 110 | GND β Ground |
| Pin 111 | I/O β User I/O |
| Pin 112 | I/O β User I/O |
| Pin 113 | I/O β User I/O |
| Pin 114 | I/O β User I/O |
| Pin 115 | VCCIO7 β I/O Bank 7 supply |
| Pin 116 | I/O β User I/O |
| Pin 117 | I/O β User I/O |
| Pin 118 | I/O β User I/O |
| Pin 119 | GND β Ground |
| Pin 120 | I/O β User I/O |
| Pin 121 | I/O β User I/O |
| Pin 122 | VCCIO8 β I/O Bank 8 supply |
| Pin 123 | I/O β User I/O |
| Pin 124 | I/O β User I/O |
| Pin 125 | I/O β User I/O |
| Pin 126 | GND β Ground |
| Pin 127 | VCCINT β Core supply (1.0V-1.2V) |
| Pin 128 | VCCINT β Core supply (1.0V-1.2V) |
| Pin 129 | VCCA_PLL β Analog PLL supply (2.5V) |
| Pin 130 | GNDA_PLL β Analog PLL ground |
| Pin 131 | CONFIG_DONE β Configuration done output |
| Pin 132 | nCONFIG β Configuration control (active-low) |
| Pin 133 | nSTATUS β Configuration status (active-low) |
| Pin 134 | TCK β JTAG clock |
| Pin 135 | TMS β JTAG mode select |
| Pin 136 | TDI β JTAG data in |
| Pin 137 | TDO β JTAG data out |
| Pin 138 | MSEL0 β Configuration mode select 0 |
| Pin 139 | MSEL1 β Configuration mode select 1 |
| Pin 140 | MSEL2 β Configuration mode select 2 |
| Pin 141 | DCLK β Configuration clock |
| Pin 142 | DATA0 β Configuration data |
| Pin 143 | nCE β Chip enable (active-low) |
| Pin 144 | VCCINT β Core supply (1.0V-1.2V) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
10CL006YE144I7G is suitable for 6 applications: Industrial Motor Control, Video Bridging and Image Aggregation, IoT Edge Sensor Hub, I/O Expansion Bridge for SoCs, Portable Medical Instrumentation, Aerospace Avionics (Non-Critical Subsystems).
Industrial Motor Control
The 10CL006YE144I7G is well suited to industrial motor-control applications because its 56 embedded 18x18 multipliers handle Field-Oriented Control (FOC) math while the Nios II soft core processes quadrature encoder feedback. The 88 user I/O accommodate three-phase PWM outputs, Hall-sensor inputs, and CAN or RS-485 communication links, and the industrial -40C to +100C temperature range meets factory-floor requirements. Compared with a microcontroller-only solution, this FPGA executes the Park/Clarke transforms and SVM in parallel hardware, enabling higher PWM frequencies with lower CPU loading. The 60 mW typical static power also simplifies thermal design in sealed IPM enclosures.
Recommended
Video Bridging and Image Aggregation
In video bridging applications, the 10CL006YE144I7G aggregates parallel image-sensor data and converts between MIPI CSI-2 and BT.656, parallel RGB, or LVDS interfaces. Its 276,480 RAM bits buffer line-scan or region-of-interest video, and the 88 user I/O support multi-lane LVDS or sub-LVDS serializer/deserializer pairs. The Cyclone 10 LP fabric implements color-space conversion and gamma correction at rates that overwhelm a typical MCU, while the exposed-pad EQFP-144 package enables standard 4-layer PCB reflow without BGA costs. Designers typically pair the FPGA with an external ADV7511 or ADV7280 video codec.
Recommended
IoT Edge Sensor Hub
For IoT edge sensor hubs, the 10CL006YE144I7G consolidates multiple SPI/I2C/UART sensor buses, runs lightweight machine-learning inferencing on the DSP blocks, and pre-aggregates data before forwarding to a low-power MCU. The under-60 mW typical static power suits battery-powered installations, and the 6,272 LEs accommodate a Tensilica or Nios II soft-core alongside custom pre-processing pipelines. Industrial temperature grade and exposed-pad cooling support outdoor deployments. The Cyclone 10 LP also integrates on-chip PLLs for flexible clocking of multiple SPI sensors at varying baud rates.
Recommended
I/O Expansion Bridge for SoCs
When a SoC runs out of GPIO or PCIe lanes, the 10CL006YE144I7G serves as an I/O expansion bridge between the host SoC and peripherals. The 88 user I/O can be partitioned into SPI, I2C, UART, PWM, and GPIO groups, while the host SoC communicates over a single SPI or parallel interface. The exposed-pad EQFP-144 footprint simplifies assembly compared to BGA alternatives. The Cyclone 10 LP supports low-power modes that allow peripherals to wake the host only when needed, conserving system power. The FPGA's 6 PLLs provide flexible clock synthesis for mixed-speed peripherals.
Recommended
Portable Medical Instrumentation
In portable medical devices such as handheld ultrasound or patient monitors, the 10CL006YE144I7G performs real-time digital signal processing on bio-signals (ECG, EMG, pulse oximetry) using its 56 DSP blocks and parallel LE fabric. The under-60 mW typical static power extends battery runtime, while the industrial temperature range accommodates skin-contact warming. The exposed-pad 144-LQFP package avoids the X-ray inspection cost of BGA parts in FDA-compliant assembly lines. The device's 88 user I/O support simultaneous TFT-LCD, touch-panel, and wireless-module interfaces typical of point-of-care medical equipment.
Recommended
Aerospace Avionics (Non-Critical Subsystems)
The 10CL006YE144I7G fits non-flight-critical avionics subsystems such as cockpit lighting controllers, in-seat power management, and IFE (in-flight entertainment) bridging. The 88 user I/O can drive multiple LED-driver channels or backplane buses, while the industrial temperature rating covers pressurized-cabin environments. The exposed-pad EQFP-144 package is hand-solder-friendly for low-volume avionics repair depots. Designers can leverage hardened DDR3 controllers for video playback buffering in IFE applications. Note that flight-critical applications require DO-254 certification and a different FPGA family such as the Microsemi RTG4.
Recommended
Recommended Products Summary
Engineering reference data for 10CL006YE144I7G β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | 10CL006YE144C8G | 10CL006YE144C6G | 10CL006YE144A7G | 10CL006YU256I7G | 10CL006YM164I7G | LFE5-12F-8BG256C | LCMXO3LF-4300E-5MG256C |
|---|---|---|---|---|---|---|---|---|
| Package | 144-LQFP Exposed Pad (EQFP-144) | 144-LQFP Exposed Pad (EQFP-144) - same | 144-LQFP Exposed Pad (EQFP-144) - same | 144-LQFP Exposed Pad (EQFP-144) - same | UBGA-256 - different package | MBGA-164 - different package | cspbga-256 - different package | cspbga-256 - different package |
| Brand | Intel | Intel - same | Intel - same | Intel - same | Intel - same | Intel - same | Lattice Semiconductor | Lattice Semiconductor |
| Logic Elements | 6,272 | 6,272 | 6,272 | 6,272 | 6,272 | 6,272 | 12,000 LUTs | 4,300 LUTs |
| Total RAM Bits | 276,480 | 276,480 | 276,480 | 276,480 | 276,480 | 276,480 | 532,480 | 92,160 |
| User I/O | 88 | 88 | 88 | 88 | 176 | 98 | 197 | 185 |
| Operating Temperature | -40C to +100C (Industrial) | 0C to +85C (Commercial) | 0C to +85C (Commercial) | -40C to +100C (Industrial) | -40C to +100C (Industrial) | -40C to +100C (Industrial) | 0C to +85C (Commercial) | -40C to +100C (Industrial) |
| Speed Grade | 7 | 8 (faster) | 6 (slowest) | 7 (same) | 7 (same) | 7 (same) | 8 | 5 |
| Configuration Mode | JTAG/AS/PS/FPP | JTAG/AS/PS/FPP | JTAG/AS/PS/FPP | JTAG/AS/PS/FPP | JTAG/AS/PS/FPP | JTAG/AS/PS/FPP | JTAG/SPI | JTAG/SPI/I2C |
Key Differentiators
- Industrial temperature range (-40C to +100C) in the same EQFP-144 footprint (vs 10CL006YE144C8G)
- Same-package drop-in upgrade path within Cyclone 10 LP family (vs 10CL006YU256I7G)
- Hardened DDR3/LPDDR2 memory controller and PCIe Gen2 soft IP (vs LCMXO3LF-4300E-5MG256C)
Design Notes
Each VCCINT pin must be decoupled with a 0.1 uF X7R ceramic within 2 mm of the pin, plus a 10 uF bulk capacitor per VCCINT rail group. VCCA_PLL requires its own filtered 2.5 V LDO supply (such as a dedicated LP38690 or LT3020) with a pi-filter (10 ohm + 10 uF + 0.1 uF) to keep PLL jitter below 200 ps RMS. Use the Intel Early Power Estimator (EPE) with your design's toggle rate and logic utilization before committing to PCB layout. Estimated: at 100 MHz toggle rate and 50 percent LE utilization, VCCINT current for the 10CL006 typically draws 80-120 mA in worst-case junction temperatures.
The 144-LQFP exposed-pad (EQFP-144) requires the central thermal pad to be soldered to a ground plane with at least 25 thermal vias (0.3 mm drill, 0.5 mm pitch) connecting to inner ground planes. Missing this connection can raise junction temperature 15-20 C above the rated ambient limit. Maintain 0.1 mm (4 mil) trace width for the 88 user I/O signals to balance manufacturability with signal integrity, and route DQS/DQ groups with matched 50 ohm impedance and 100 ps length matching per the Cyclone 10 LP handbook external memory guidelines.
Do not assume the same bitstream works across the I7G/C8G/C6G speed variants - Quartus Prime generates a per-OPN bitstream because the chip ID and timing models differ. MSEL[2:0] pins must be tied to logic levels that match your chosen configuration mode (10=AS, 00=PS, 01=FPP) per the Cyclone 10 LP configuration handbook - mis-wired MSEL pins cause configuration failure with no JTAG-detectable error. Estimated: at 50 MHz fMAX with 70 percent LE utilization, a poorly stitched exposed pad can add 5-8 C to junction temperature versus the datasheet thermal resistance model.
Compliance Information
RoHS and REACH compliance per Intel Cyclone 10 LP product page. AEC-Q100 not applicable for FPGAs - automotive qualification is at the system integrator's discretion.