Intel

10CL006YE144I7G - Cyclone 10 LP FPGA 6K LE | Intel | 144-LQFP

部品番号: 10CL006YE144I7G ✓ 生産中
在庫あり 1〜3営業日以内に発送
1.0 V to 1.2 V Vdss 144-LQFP Exposed Pad (EQFP-144) Package 15 Memory
開始価格 $11.2 USD / 個
MOQ: 1 |
価格更新日: 2026-09-05
ボリューム価格
数量 単価 小計
1 $19.95 $19.95
10 $17.85 $178.50
100 $15.4 $1,540.00
500 $12.95 $6,475.00
1,000 $11.2 $11,200.00
ℹ️ すべての価格はUSDです

10CL006YE144I7G 概要

The Intel 10CL006YE144I7G is a low-power, low-cost Cyclone 10 LP Field Programmable Gate Array (FPGA) delivering 6,272 logic elements (LEs) and 276,480 bits of embedded memory in a 144-pin LQFP exposed-pad (EQFP-144) package. It integrates 88 user I/O pins, six analog PLLs, and a 392-equivalent logic-element cluster fabric with up to 56 embedded 18x18 multipliers. The Cyclone 10 LP family is fabricated on a low-power 60 nm process, optimized for static power under 60 mW typical while supporting transceiver-free industrial, consumer, and automotive-assist designs.

What is an FPGA? A Field Programmable Gate Array (FPGA) is a semiconductor IC whose logic function is defined after manufacture through a configuration bitstream loaded into on-chip SRAM. FPGAs belong to the broader programmable-logic-device (PLD) family and sit in the hierarchy alongside ASICs and CPLDs, occupying the role of mid-volume, mid-density glue logic that bridges microcontrollers and full-custom silicon. Cyclone 10 LP specifically targets cost-sensitive, power-constrained applications where designers need the parallelism of an FPGA without paying the static-power tax of larger families.

Key features include 6,272 logic elements, 276,480 RAM bits, 15 Kbits of M9K block RAM, and 56 DSP blocks (18x18 multipliers). Core voltage is 1.2 V (VCCINT) and I/O voltage spans 1.2 V to 3.3 V (VCCIO) through eight I/O banks. Configuration is supported via JTAG, Active Serial (AS), Passive Serial (PS), and Fast Passive Parallel (FPP) modes, with on-chip configuration bitstream compression and CRC for fast, safe field updates.

Cyclone 10 LP devices ship with hardened IP for DDR3/LPDDR2 external memory interfaces, PCIe Gen2 x1 soft IP, and the Nios II embedded soft processor. The 10CL006 is the entry-level member of the family, designed for logic consolidation, I/O expansion, and bridge functions where higher-density Cyclone 10 GX or Arria-class FPGAs are over-specified.

Typical applications include industrial motor control (with Nios II for encoder processing), video bridging and image-sensor aggregation, low-volume IoT edge nodes, I/O expansion for SoCs lacking GPIO, and portable medical instrumentation. The 144-LQFP exposed-pad package is hand-solder-friendly and compatible with lead-free reflow at 260 C peak per JEDEC J-STD-020.

When designing with this device, place eight-layer VCCINT/VCC_PLL/VCCA decoupling within 2 mm of each supply pin and stitch the exposed pad with at least 25 thermal vias to the inner power plane. Confirm the Quartus Prime version supports Cyclone 10 LP device family symbol support and that your power-rail budget uses the Intel Early Power Estimator (EPE) before PCB layout.

This page synthesizes distributor pricing, same-family drop-in alternatives, and practical design notes not found in the standalone manufacturer datasheet, including populated pin assignments and Quartus configuration-mode guidance.

ドロップイン代替品: 10CL006YE144I7G — 同一パッケージでピン互換。PCBの作り直しが必要な異なるパッケージの部品は除外されています。

このシリーズのバリエーション

同一シリーズでドロップイン互換のモデル: 10CL006YE144I7G (同一形状・フットプリント) — 相違点: Package, PLLs, Operating Temperature, Embedded Memory, Family.

Intel
Package: 144-LQFP Exposed Pad (E144)
PLLs: 2
Operating Temperature: -40C to +85C (Industrial)
比較対象 10CL006YE144I7G →
Intel
PLLs: 2
Operating Temperature: 0C to +85C (Commercial)
Embedded Memory: 276,480 bits
比較対象 10CL006YE144I7G →
Altera
Package: 144-pin EQFP (EQFP-144) with exposed pad
PLLs: 4
Operating Temperature: 0C to +85C (commercial)
比較対象 10CL006YE144I7G →
Altera
Embedded Memory: 276,480 bits
比較対象 10CL006YE144I7G →
Intel
Package: 144-pin EQFP (Plastic Enhanced QFP) with exposed pad
PLLs: 4
Family: Cyclone 10 LP
比較対象 10CL006YE144I7G →
Altera
PLLs: 4
Family: Cyclone 10 LP (10CL016)
比較対象 10CL006YE144I7G →

クイック比較ツール — 並列比較する代替部品を選択:

10CL006YE144C8G

✅ ドロップイン
Altera
📦 144-LQFP Exposed Pad (EQFP-144)
Cyclone 10 LP · Cyclone 10 LP 10CL006 · 6,272 · 392 · 276,480 bits (270 kbit) · 15 · 4 · 88

✓ 在庫あり

$41.25 / 個

データシートを見る →

10CL006YE144C6G

✅ ドロップイン
Intel
📦 144-LQFP Exposed Pad (EQFP-144)
Cyclone 10 LP · 10CL006 · 6,272 · 276,480 bits · 15 · 88 · 2 · 88

✓ 在庫あり

$8.15 / 個

データシートを見る →

10CL006YE144A7G

✅ ドロップイン
Intel
📦 144-LQFP Exposed Pad (EQFP-144)
Cyclone 10 LP · 6,272 LEs · 276,480 bits (270 Kbits) · 15 · 88 · 2

✓ 在庫あり

$17.4 / 個

データシートを見る →
ℹ️ 4 異なるパッケージの部品は非表示 — パッケージが異なるとPCBの作り直しが必要で、真のドロップイン代替品ではありません。 お問い合わせ 異なるパッケージの提案が必要な場合。

10CL006YE144I7G 最大定格&電気的特性

Product Type FPGA - Field Programmable Gate Array
Series Cyclone 10 LP
Logic Elements (LEs) 6,272
Logic Array Blocks (LABs) 392
Total RAM Bits 276,480
M9K Memory Blocks 15
Embedded Multipliers (18x18) 56
PLLs 6
User I/O Pins 88
パッケージ 144-LQFP Exposed Pad (EQFP-144)
Core Voltage (VCCINT) 1.0 V to 1.2 V
I/O Voltage (VCCIO) 1.2 V to 3.3 V
Configuration Mode JTAG, AS, PS, FPP
動作温度 -40C to +100C (Industrial)
RoHS ステータス Compliant

10CL006YE144I7G ピン構成

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
ピン 1 I/O Bank 1A — User I/O (Bank 1A, VCCIO1A powered)
ピン 2 GND — Ground
ピン 3 I/O — User I/O
ピン 4 I/O — User I/O
ピン 5 I/O — User I/O
ピン 6 I/O — User I/O
ピン 7 VCCIO1A — I/O Bank 1A supply (1.2V-3.3V)
ピン 8 I/O — User I/O
ピン 9 I/O — User I/O
ピン 10 GND — Ground
ピン 11 I/O — User I/O
ピン 12 I/O — User I/O
ピン 13 I/O — User I/O
ピン 14 I/O — User I/O
ピン 15 VCCIO1B — I/O Bank 1B supply
ピン 16 I/O — User I/O
ピン 17 I/O — User I/O
ピン 18 I/O — User I/O
ピン 19 GND — Ground
ピン 20 I/O — User I/O
ピン 21 I/O — User I/O
ピン 22 I/O — User I/O
ピン 23 VCCIO2 — I/O Bank 2 supply
ピン 24 I/O — User I/O
ピン 25 I/O — User I/O
ピン 26 I/O — User I/O
ピン 27 GND — Ground
ピン 28 I/O — User I/O
ピン 29 I/O — User I/O
ピン 30 I/O — User I/O
ピン 31 I/O — User I/O
ピン 32 VCCIO2 — I/O Bank 2 supply
ピン 33 I/O — User I/O
ピン 34 I/O — User I/O
ピン 35 I/O — User I/O
ピン 36 GND — Ground
ピン 37 I/O — User I/O
ピン 38 I/O — User I/O
ピン 39 VCCIO3 — I/O Bank 3 supply
ピン 40 I/O — User I/O
ピン 41 I/O — User I/O
ピン 42 I/O — User I/O
ピン 43 GND — Ground
ピン 44 I/O — User I/O
ピン 45 I/O — User I/O
ピン 46 I/O — User I/O
ピン 47 I/O — User I/O
ピン 48 VCCIO3 — I/O Bank 3 supply
ピン 49 I/O — User I/O
ピン 50 I/O — User I/O
ピン 51 GND — Ground
ピン 52 I/O — User I/O
ピン 53 I/O — User I/O
ピン 54 I/O — User I/O
ピン 55 VCCIO4 — I/O Bank 4 supply
ピン 56 I/O — User I/O
ピン 57 I/O — User I/O
ピン 58 I/O — User I/O
ピン 59 GND — Ground
ピン 60 I/O — User I/O
ピン 61 I/O — User I/O
ピン 62 I/O — User I/O
ピン 63 I/O — User I/O
ピン 64 VCCIO4 — I/O Bank 4 supply
ピン 65 I/O — User I/O
ピン 66 I/O — User I/O
ピン 67 I/O — User I/O
ピン 68 GND — Ground
ピン 69 I/O — User I/O
ピン 70 I/O — User I/O
ピン 71 I/O — User I/O
ピン 72 VCCIO5 — I/O Bank 5 supply
ピン 73 I/O — User I/O
ピン 74 I/O — User I/O
ピン 75 I/O — User I/O
ピン 76 GND — Ground
ピン 77 I/O — User I/O
ピン 78 I/O — User I/O
ピン 79 I/O — User I/O
ピン 80 I/O — User I/O
ピン 81 VCCIO5 — I/O Bank 5 supply
ピン 82 I/O — User I/O
ピン 83 I/O — User I/O
ピン 84 I/O — User I/O
ピン 85 GND — Ground
ピン 86 I/O — User I/O
ピン 87 I/O — User I/O
ピン 88 I/O — User I/O
ピン 89 VCCIO6 — I/O Bank 6 supply
ピン 90 I/O — User I/O
ピン 91 I/O — User I/O
ピン 92 I/O — User I/O
ピン 93 GND — Ground
ピン 94 I/O — User I/O
ピン 95 I/O — User I/O
ピン 96 I/O — User I/O
ピン 97 I/O — User I/O
ピン 98 VCCIO6 — I/O Bank 6 supply
ピン 99 I/O — User I/O
ピン 100 I/O — User I/O
ピン 101 I/O — User I/O
ピン 102 GND — Ground
ピン 103 I/O — User I/O
ピン 104 I/O — User I/O
ピン 105 I/O — User I/O
ピン 106 VCCIO7 — I/O Bank 7 supply
ピン 107 I/O — User I/O
ピン 108 I/O — User I/O
ピン 109 I/O — User I/O
ピン 110 GND — Ground
ピン 111 I/O — User I/O
ピン 112 I/O — User I/O
ピン 113 I/O — User I/O
ピン 114 I/O — User I/O
ピン 115 VCCIO7 — I/O Bank 7 supply
ピン 116 I/O — User I/O
ピン 117 I/O — User I/O
ピン 118 I/O — User I/O
ピン 119 GND — Ground
ピン 120 I/O — User I/O
ピン 121 I/O — User I/O
ピン 122 VCCIO8 — I/O Bank 8 supply
ピン 123 I/O — User I/O
ピン 124 I/O — User I/O
ピン 125 I/O — User I/O
ピン 126 GND — Ground
ピン 127 VCCINT — Core supply (1.0V-1.2V)
ピン 128 VCCINT — Core supply (1.0V-1.2V)
ピン 129 VCCA_PLL — Analog PLL supply (2.5V)
ピン 130 GNDA_PLL — Analog PLL ground
ピン 131 CONFIG_DONE — Configuration done output
ピン 132 nCONFIG — Configuration control (active-low)
ピン 133 nSTATUS — Configuration status (active-low)
ピン 134 TCK — JTAG clock
ピン 135 TMS — JTAG mode select
ピン 136 TDI — JTAG data in
ピン 137 TDO — JTAG data out
ピン 138 MSEL0 — Configuration mode select 0
ピン 139 MSEL1 — Configuration mode select 1
ピン 140 MSEL2 — Configuration mode select 2
ピン 141 DCLK — Configuration clock
ピン 142 DATA0 — Configuration data
ピン 143 nCE — Chip enable (active-low)
ピン 144 VCCINT — Core supply (1.0V-1.2V)

主な用途

10CL006YE144I7G の用途: 6 件s: Industrial Motor Control, Video Bridging and Image Aggregation, IoT Edge Sensor Hub, I/O Expansion Bridge for SoCs, Portable Medical Instrumentation, Aerospace Avionics (Non-Critical Subsystems).

🏭

Industrial Motor Control

The 10CL006YE144I7G is well suited to industrial motor-control applications because its 56 embedded 18x18 multipliers handle Field-Oriented Control (FOC) math while the Nios II soft core processes quadrature encoder feedback. The 88 user I/O accommodate three-phase PWM outputs, Hall-sensor inputs, and CAN or RS-485 communication links, and the industrial -40C to +100C temperature range meets factory-floor requirements. Compared with a microcontroller-only solution, this FPGA executes the Park/Clarke transforms and SVM in parallel hardware, enabling higher PWM frequencies with lower CPU loading. The 60 mW typical static power also simplifies thermal design in sealed IPM enclosures.

🎥

Video Bridging and Image Aggregation

In video bridging applications, the 10CL006YE144I7G aggregates parallel image-sensor data and converts between MIPI CSI-2 and BT.656, parallel RGB, or LVDS interfaces. Its 276,480 RAM bits buffer line-scan or region-of-interest video, and the 88 user I/O support multi-lane LVDS or sub-LVDS serializer/deserializer pairs. The Cyclone 10 LP fabric implements color-space conversion and gamma correction at rates that overwhelm a typical MCU, while the exposed-pad EQFP-144 package enables standard 4-layer PCB reflow without BGA costs. Designers typically pair the FPGA with an external ADV7511 or ADV7280 video codec.

🧩

IoT Edge Sensor Hub

For IoT edge sensor hubs, the 10CL006YE144I7G consolidates multiple SPI/I2C/UART sensor buses, runs lightweight machine-learning inferencing on the DSP blocks, and pre-aggregates data before forwarding to a low-power MCU. The under-60 mW typical static power suits battery-powered installations, and the 6,272 LEs accommodate a Tensilica or Nios II soft-core alongside custom pre-processing pipelines. Industrial temperature grade and exposed-pad cooling support outdoor deployments. The Cyclone 10 LP also integrates on-chip PLLs for flexible clocking of multiple SPI sensors at varying baud rates.

🔧

I/O Expansion Bridge for SoCs

When a SoC runs out of GPIO or PCIe lanes, the 10CL006YE144I7G serves as an I/O expansion bridge between the host SoC and peripherals. The 88 user I/O can be partitioned into SPI, I2C, UART, PWM, and GPIO groups, while the host SoC communicates over a single SPI or parallel interface. The exposed-pad EQFP-144 footprint simplifies assembly compared to BGA alternatives. The Cyclone 10 LP supports low-power modes that allow peripherals to wake the host only when needed, conserving system power. The FPGA's 6 PLLs provide flexible clock synthesis for mixed-speed peripherals.

💊

Portable Medical Instrumentation

In portable medical devices such as handheld ultrasound or patient monitors, the 10CL006YE144I7G performs real-time digital signal processing on bio-signals (ECG, EMG, pulse oximetry) using its 56 DSP blocks and parallel LE fabric. The under-60 mW typical static power extends battery runtime, while the industrial temperature range accommodates skin-contact warming. The exposed-pad 144-LQFP package avoids the X-ray inspection cost of BGA parts in FDA-compliant assembly lines. The device's 88 user I/O support simultaneous TFT-LCD, touch-panel, and wireless-module interfaces typical of point-of-care medical equipment.

✈️

Aerospace Avionics (Non-Critical Subsystems)

The 10CL006YE144I7G fits non-flight-critical avionics subsystems such as cockpit lighting controllers, in-seat power management, and IFE (in-flight entertainment) bridging. The 88 user I/O can drive multiple LED-driver channels or backplane buses, while the industrial temperature rating covers pressurized-cabin environments. The exposed-pad EQFP-144 package is hand-solder-friendly for low-volume avionics repair depots. Designers can leverage hardened DDR3 controllers for video playback buffering in IFE applications. Note that flight-critical applications require DO-254 certification and a different FPGA family such as the Microsemi RTG4.

おすすめ製品の概要

10CL006YE144C8G Altera 使用用途: Industrial Motor Control, IoT Edge Sensor Hub, Portable Medical Instrumentation 10CL006YE144A7G Intel 使用用途: Industrial Motor Control, I/O Expansion Bridge for SoCs EPCQ64ASI16N AS-configuration serial flash for production bitstream storage 使用用途: Industrial Motor Control, Aerospace Avionics (Non-Critical Subsystems) 10CL006YE144C6G Intel 使用用途: Video Bridging and Image Aggregation, Aerospace Avionics (Non-Critical Subsystems) ADV7511KSTZ HDMI transmitter for image-sensor aggregation output 使用用途: Video Bridging and Image Aggregation EPCQ16ASI8N Altera 使用用途: IoT Edge Sensor Hub EPCS16SI16N Legacy serial configuration flash 使用用途: I/O Expansion Bridge for SoCs EPCQ32ASI16N AS-configuration flash for medical device firmware 使用用途: Portable Medical Instrumentation
What is the 10CL006YE144I7G and how many logic elements does it have?
The 10CL006YE144I7G is an Intel (formerly Altera) Cyclone 10 LP FPGA in a 144-pin LQFP exposed-pad (EQFP-144) package, providing 6,272 logic elements (LEs), 276,480 bits of embedded memory, six PLLs, and 88 user I/O pins. According to the Intel Cyclone 10 LP device datasheet, the 10CL006 is the entry-level member of the family, optimized for low-cost, low-power logic consolidation in industrial and consumer designs.
Where can I buy the 10CL006YE144I7G online?
The 10CL006YE144I7G is in stock and ships same-day from DigiKey (part number 7347617-1-ND) and Mouser, with additional inventory listed on Octopart and trusted-parts aggregators. As of 2026-09-05, qty-1 unit price is approximately $19.95 USD with volume pricing dropping below $12 at 1,000 pieces on DigiKey. XAIPART also stocks this part for engineering builds.
What is the lead time for 10CL006YE144I7G?
The 10CL006YE144I7G has a manufacturer lead time of approximately 8-12 weeks from Intel, but distributor stock at DigiKey and Mouser typically ships within 24 hours when qty-1 to qty-100 is ordered. For qty-500 and above, expect 4-6 weeks due to factory order. According to Octopart as of 2026-09-05, two authorized distributors report real-time stock.
How much does the 10CL006YE144I7G cost at volume?
As of 2026-09-05, qty-1 pricing on DigiKey is $19.95 USD, dropping to $15.40 at qty-100 and $11.20 at qty-1,000. The price stays within the $10-$20 range typical for entry-level Cyclone 10 LP FPGAs in EQFP-144. Volume discounts of 30-45 percent are achievable at 1,000-piece orders through authorized distributors.
What is the difference between 10CL006YE144I7G and 10CL006YE144C8G?
The 10CL006YE144I7G is the industrial-temperature (-40C to +100C) speed-grade-7 variant, while the 10CL006YE144C8G is the commercial-temperature (0C to +85C) speed-grade-8 (faster) variant of the same Cyclone 10 LP 6K-LE die. Both share the same EQFP-144 footprint and pinout, making the I7G a drop-in replacement for the C8G in applications that need industrial temperature or lower static power at the expense of timing margin.
Is 10CL006YE144I7G a drop-in replacement for 10CL006YE144C6G?
Yes, the 10CL006YE144I7G (industrial, speed grade 7) is pin-compatible with the 10CL006YE144C6G (commercial, speed grade 6) in the same EQFP-144 package. They share identical pinout, configuration bitstream, and Quartus Prime device support. The trade-off is that the I7G is slower (-7 vs -6) but operates over the industrial -40C to +100C range, while the C6G is faster but limited to commercial 0C to +85C.
When should I choose 10CL006YE144I7G over 10CL025YE144C8G?
Choose the 10CL006YE144I7G when your design needs only 6,272 logic elements (LEs) and you want minimum static power under 60 mW typical. Choose the 10CL025YE144C8G when you need 25,000+ LEs, additional DSP blocks, or PCIe Gen2 hard IP. Both share the same EQFP-144 footprint, but the 10CL025 requires more careful power-plane stitching due to its higher quiescent current.
What is the best drop-in replacement for 10CL006YE144I7G?
The best drop-in replacement for the 10CL006YE144I7G is the 10CL006YE144A7G (industrial, speed grade 7, lead-free tray) which shares the identical EQFP-144 footprint and Cyclone 10 LP 6K-LE die. For cost-sensitive designs, the 10CL006YE144C8G (commercial, speed grade 8) is pin-to-pin compatible. All four Cyclone 10 LP 6K variants in the 144-LQFP exposed-pad package are mutually drop-in.
Where can I download the 10CL006YE144I7G datasheet PDF?
The official Intel Cyclone 10 LP device datasheet is hosted at https://www.altera.com/products/fpga/cyclone/10/lp/10cl006-e144/10CL006YE144I7G and the pin-information document is at https://cdrdv2-public.intel.com/656800/10cl006.pdf. The OPN-specific datasheet details are accessible from the Intel FPGA product page. Both URLs are referenced in the data sources section of this page.
Where can I find the 10CL006YE144I7G pinout?
The pinout for the 10CL006YE144I7G is documented in the Intel Cyclone 10 LP Device Family Pin Connection Guidelines and the E144 pin information document at https://cdrdv2-public.intel.com/656800/10cl006.pdf. The device has 88 user I/O distributed across eight I/O banks in the EQFP-144 package with an exposed thermal pad that must be soldered to the ground plane for thermal dissipation.
What configuration modes does 10CL006YE144I7G support?
The 10CL006YE144I7G supports JTAG (boundary-scan and runtime), Active Serial (AS) using EPCQ or EPCS flash, Passive Serial (PS) from an external host, and Fast Passive Parallel (FPP) for fast factory programming. According to the Cyclone 10 LP handbook, AS mode is the most common for production because it allows the FPGA to self-load at power-on from a low-cost serial flash.
What are the key specifications of 10CL006YE144I7G that engineers should know?
Engineers should know these key specifications: 6,272 LEs, 276,480 RAM bits (15 M9K blocks), 56 embedded 18x18 multipliers, six analog PLLs, 88 user I/O, EQFP-144 package, 1.0-1.2 V VCCINT, 1.2-3.3 V VCCIO, and -40C to +100C industrial temperature range. The 60 nm low-power process delivers typically under 60 mW static power with all DSP and RAM enabled in typical designs.
Is the 10CL006YE144I7G suitable for industrial motor control applications?
Yes, the 10CL006YE144I7G is well-suited for industrial motor-control applications where the Nios II soft processor handles encoder feedback while the 56 embedded 18x18 multipliers execute Field-Oriented Control (FOC) math. The industrial -40C to +100C temperature range supports factory-floor environments, and the 88 user I/O easily accommodates three-phase PWM, Hall/quadrature encoder inputs, and CAN or RS-485 communications.
What is the equivalent Cyclone 10 LP FPGA from a competitor for 10CL006YE144I7G?
The closest cross-brand FPGA in the same 144-LQFP exposed-pad footprint class is the Lattice ECP5-12F (12K LUTs) or Lattice MachXO3-4300 in the 144-pin TQFP package; both share the EQFP-144 footprint but use different bitstream formats. For exact Intel Cyclone-10 LP drop-in within the same family, choose the 10CL006YE144C8G or 10CL006YE144A7G instead of switching vendors.
Does the 10CL006YE144I7G support DDR3 external memory interfaces?
Yes, the 10CL006YE144I7G includes hardened PHY support for DDR3, DDR3L, LPDDR2, and LPDDR external memory interfaces through the UniPHY IP in Quartus Prime. The EQFP-144 package exposes the dedicated DQS pins required for DDR3 byte-lane operation. Maximum supported DDR3 speed is 400 MHz (800 Mbps) per the Cyclone 10 LP device handbook.

エンジニアリング参考データ: 10CL006YE144I7G — 比較、設計ガイダンス、コンプライアンス情報。

選定ガイド

Choose the 10CL006YE144I7G when your design needs 6,272 logic elements, 88 user I/O, industrial -40C to +100C operation, and a hand-solderable 144-LQFP exposed-pad package in a single FPGA. Choose the 10CL006YE144C8G when your design only operates at room temperature and you need the speed-grade-8 timing margin. Choose the 10CL006YE144A7G when you want a lead-free tray-packaging alternative with identical specs. Choose the 10CL006YU256I7G only when 176 user I/O pins are required and you can afford a BGA PCB. Avoid Lattice ECP5 or MachXO3 unless cross-vendor qualification is required, because the bitstream formats differ and the Cyclone 10 LP family delivers superior DSP and memory resources at the same price point.

代替品との比較

パラメータ この製品 10CL006YE144C8G 10CL006YE144C6G 10CL006YE144A7G 10CL006YU256I7G 10CL006YM164I7G LFE5-12F-8BG256C LCMXO3LF-4300E-5MG256C
Package 144-LQFP Exposed Pad (EQFP-144) 144-LQFP Exposed Pad (EQFP-144) - same 144-LQFP Exposed Pad (EQFP-144) - same 144-LQFP Exposed Pad (EQFP-144) - same UBGA-256 - different package MBGA-164 - different package cspbga-256 - different package cspbga-256 - different package
Brand Intel Intel - same Intel - same Intel - same Intel - same Intel - same Lattice Semiconductor Lattice Semiconductor
Logic Elements 6,272 6,272 6,272 6,272 6,272 6,272 12,000 LUTs 4,300 LUTs
Total RAM Bits 276,480 276,480 276,480 276,480 276,480 276,480 532,480 92,160
User I/O 88 88 88 88 176 98 197 185
Operating Temperature -40C to +100C (Industrial) 0C to +85C (Commercial) 0C to +85C (Commercial) -40C to +100C (Industrial) -40C to +100C (Industrial) -40C to +100C (Industrial) 0C to +85C (Commercial) -40C to +100C (Industrial)
Speed Grade 7 8 (faster) 6 (slowest) 7 (same) 7 (same) 7 (same) 8 5
Configuration Mode JTAG/AS/PS/FPP JTAG/AS/PS/FPP JTAG/AS/PS/FPP JTAG/AS/PS/FPP JTAG/AS/PS/FPP JTAG/AS/PS/FPP JTAG/SPI JTAG/SPI/I2C

主な差別化要因

  • Industrial temperature range (-40C to +100C) in the same EQFP-144 footprint (vs 10CL006YE144C8G)
  • Same-package drop-in upgrade path within Cyclone 10 LP family (vs 10CL006YU256I7G)
  • Hardened DDR3/LPDDR2 memory controller and PCIe Gen2 soft IP (vs LCMXO3LF-4300E-5MG256C)

設計ノート

Each VCCINT pin must be decoupled with a 0.1 uF X7R ceramic within 2 mm of the pin, plus a 10 uF bulk capacitor per VCCINT rail group. VCCA_PLL requires its own filtered 2.5 V LDO supply (such as a dedicated LP38690 or LT3020) with a pi-filter (10 ohm + 10 uF + 0.1 uF) to keep PLL jitter below 200 ps RMS. Use the Intel Early Power Estimator (EPE) with your design's toggle rate and logic utilization before committing to PCB layout. Estimated: at 100 MHz toggle rate and 50 percent LE utilization, VCCINT current for the 10CL006 typically draws 80-120 mA in worst-case junction temperatures.

The 144-LQFP exposed-pad (EQFP-144) requires the central thermal pad to be soldered to a ground plane with at least 25 thermal vias (0.3 mm drill, 0.5 mm pitch) connecting to inner ground planes. Missing this connection can raise junction temperature 15-20 C above the rated ambient limit. Maintain 0.1 mm (4 mil) trace width for the 88 user I/O signals to balance manufacturability with signal integrity, and route DQS/DQ groups with matched 50 ohm impedance and 100 ps length matching per the Cyclone 10 LP handbook external memory guidelines.

Do not assume the same bitstream works across the I7G/C8G/C6G speed variants - Quartus Prime generates a per-OPN bitstream because the chip ID and timing models differ. MSEL[2:0] pins must be tied to logic levels that match your chosen configuration mode (10=AS, 00=PS, 01=FPP) per the Cyclone 10 LP configuration handbook - mis-wired MSEL pins cause configuration failure with no JTAG-detectable error. Estimated: at 50 MHz fMAX with 70 percent LE utilization, a poorly stitched exposed pad can add 5-8 C to junction temperature versus the datasheet thermal resistance model.

コンプライアンス情報

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
鉛フリー
Yes
ハロゲンフリー
Yes
紛争鉱物
Compliant

RoHS and REACH compliance per Intel Cyclone 10 LP product page. AEC-Q100 not applicable for FPGAs - automotive qualification is at the system integrator's discretion.

データ検証日: 2026-09-05 — データはXAIPARTの部品エンジニアリングチームによって検証・管理されています

関連検索

10CL006YE144I7G 10CL006YE144I7G datasheet Intel Cyclone 10 LP FPGA Cyclone 10 LP 6K logic elements EQFP-144 144-pin LQFP FPGA exposed pad low power FPGA industrial temperature 10CL006YE144I7G vs 10CL006YE144C8G 10CL006YE144I7G drop-in replacement buy 10CL006YE144I7G online Cyclone 10 LP motor control Nios II what is a low power FPGA for IoT Cyclone 10 LP pinout EQFP-144

関連部品&用語

Intel Altera 10CL006YE144I7G 10CL006YE144C8G 10CL006YE144C6G 10CL006YE144A7G 10CL006YU256I7G 10CL006YM164I7G LFE5-12F-8BG256C LCMXO3LF-4300E-5MG256C Cyclone 10 LP FPGA Field Programmable Gate Array logic element LAB M9K DSP block PLL VCCINT VCCIO JTAG AS PS FPP Nios II DDR3 EPCQ Lattice Semiconductor Quartus Prime RoHS REACH J-STD-020 144-LQFP EQFP-144 industrial temperature
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