ATSAMA5D26C-CU - 500MHz ARM Cortex-A5 MPU 289-LFBGA | Microchip
MPN: ATSAMA5D26C-CU β Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $19.02 | $19.02 |
| 10 | $17.5 | $175.00 |
| 100 | $15.2 | $1,520.00 |
| 500 | $13.45 | $6,725.00 |
| 1,000 | $11.8 | $11,800.00 |
ATSAMA5D26C-CU Overview
An ARM Cortex-A5 application processor is a 32-bit RISC CPU core designed by Arm Holdings that targets cost-sensitive, power-constrained embedded applications. Cortex-A5 implements the ARMv7-A architecture with optional NEON and FPU, providing a balanced performance-per-watt profile compared to Cortex-A7/A9. Within the broader taxonomy, the SAMA5D2 family sits as MPU > application processor > microcontroller/MPU > semiconductor > integrated circuit. The SAMA5D2 line emphasizes Linux-capable MPUs with hardware security and ultra-low standby power (about 5 Β΅A in backup mode), bridging MCU simplicity with application-processor performance.
The ATSAMA5D26C-CU features a hardware AES/SHA/TRNG cryptographic engine, secure boot with tamper detection, MIPI CSI-2 camera interface, 24-bit LCD controller up to 1024x768, USB Host/Device, I2S, and up to 11 UARTs. It is offered in industrial (-40C to +85C) temperature range and operates from a 1.2 V core supply with simple power management scheme (single 3.3 V I/O supply).
Typical applications include industrial HMI panels, secure IoT gateways, edge-AI sensor hubs, building automation controllers, and Linux-based point-of-sale terminals. When designing, plan for 0.8 mm pitch BGA fanout, ground-place capacitors under the exposed die pad, and a separate 1.2 V LDO for core. This page combines distributor pricing, SAMA5D2 family drop-in alternatives, and practical design notes that go beyond the datasheet headline specs.
Drop-in alternatives for ATSAMA5D26C-CU β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with ATSAMA5D26C-CU (same form factor and footprint) β differing in Ethernet, USB, Package, External Memory Support, Core Architecture.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
ATSAMA5D26C-CNR
β Drop-Inβ In Stock
$10.85 / Unit
View Datasheet βATSAMA5D26B-CU
β Drop-Inβ In Stock
$7.5 / Unit
View Datasheet βATSAMA5D26B-CNR
β Drop-Inβ In Stock
$9.1 / Unit
View Datasheet βATSAMA5D27C-CU
β Drop-Inβ In Stock
$11.9 / Unit
View Datasheet βATSAMA5D26A-CUR
β Drop-Inβ In Stock
$14.2 / Unit
View Datasheet βATSAMA5D26A-CN
β Drop-Inβ In Stock
$15.2 / Unit
View Datasheet βATSAMA5D26C-CU Maximum Ratings & Electrical Characteristics
| Product Type | Microprocessor (MPU) |
| Core | ARM Cortex-A5 (32-bit, single-core) |
| Maximum CPU Clock | 500 MHz |
| Internal SRAM | 128 KB |
| Internal ROM | 160 KB |
| L1 Cache | 32 KB I-cache + 32 KB D-cache |
| External Memory Support | DDR2 / DDR3L / LPDDR2 / LPDDR3, QSPI, e.MMC |
| Package | 289-LFBGA (14x14 mm, 0.8 mm ball pitch) |
| Supply Voltage (Core) | 1.2 V |
| Supply Voltage (I/O) | 3.3 V |
| Operating Temperature | -40C to +85C (industrial) |
| Backup Mode Current | ~5 Β΅A (per SAMA5D2 family datasheet) |
| Security Features | Secure boot, HW AES/SHA/TRNG, tamper pins |
| Display Controller | 24-bit LCD up to 1024x768 |
| Connectivity | 2x GMAC, 2x CAN-FD, USB Host/Device, 11x UART, I2S, SPI, I2C |
| Camera Interface | MIPI CSI-2, 12-bit parallel |
| RoHS Status | Compliant |
ATSAMA5D26C-CU 289-lfbga (14x14 mm, 0.8 mm ball pitch) Pin Configuration Guide
Pin configuration for ATSAMA5D26C-CU (289-lfbga (14x14 mm, 0.8 mm ball pitch) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for ATSAMA5D26C-CU.
Refer to the datasheet for full pin configuration.
Typical Applications
ATSAMA5D26C-CU is suitable for 6 applications: Industrial HMI Panel Controller, Secure IoT Edge Gateway, Building Automation Controller, Edge-AI Vision Sensor Hub, Point-of-Sale (POS) Terminal, Medical Patient Monitor Sub-system.
Industrial HMI Panel Controller
The ATSAMA5D26C-CU is a strong fit for industrial HMI panels thanks to its integrated 24-bit LCD controller supporting resolutions up to 1024x768 and its 500 MHz ARM Cortex-A5 core that runs embedded Linux graphics stacks such as Qt/EGLFS or LVGL. The on-chip display pipeline eliminates the need for an external graphics controller, reducing BOM cost and PCB area. Hardware acceleration for image scaling and color-space conversion offloads the CPU, allowing smooth UI animation even with high refresh rates. The 289-LFBGA package with 0.8 mm pitch enables compact panel designs; the -40C to +85C industrial temperature range supports factory-floor deployment. Connectivity to touch controllers via I2C and to industrial sensors via CAN-FD or UART is provided on-chip, simplifying HMI board design.
Recommended
Secure IoT Edge Gateway
The ATSAMA5D26C-CU excels in secure IoT edge gateways because of its integrated hardware AES/SHA/TRNG cryptographic accelerator and secure boot ROM that prevents unauthorized firmware execution. Dual Gigabit Ethernet MACs allow simultaneous WAN/LAN connectivity with line-rate throughput, while dual CAN-FD interfaces connect to industrial sensor buses for Modbus, BACnet, or CANopen aggregation. Embedded Linux with mainline kernel support simplifies deployment of MQTT, OPC-UA, and CoAP protocol stacks. Hardware tamper pins trigger secure erase of secrets on enclosure intrusion, satisfying common IoT security frameworks. The 5 Β΅A backup-mode current keeps battery-backed gateways online during mains loss without draining storage cells.
Recommended
Building Automation Controller
The ATSAMA5D26C-CU is a natural fit for building automation controllers, where the Cortex-A5 runs Linux and orchestrates HVAC, lighting, access control, and energy-management subsystems over RS-485, BACnet, KNX, or Modbus. The high peripheral count - up to 11 UARTs, multiple SPI/I2C, and I2S - allows direct attachment of multiple field buses without external bridge ICs. The hardware crypto block secures OTA firmware updates, a critical requirement for connected building devices. The 1.2 V core plus 3.3 V I/O supply simplifies power tree design; a small buck converter and LDO combination suffices. The industrial temperature grade and long-life-cycle silicon make the SAMA5D2 family a staple for commercial building products designed for 10+ year field deployments.
Recommended
Edge-AI Vision Sensor Hub
The ATSAMA5D26C-CU's MIPI CSI-2 camera interface and 12-bit parallel ISI support direct attachment of image sensors in edge-AI vision sensor hubs for industrial inspection, smart retail, or access-control analytics. The Cortex-A5 core runs lightweight TensorFlow Lite or ONNX inference models for object detection and classification at modest frame rates. Dual Ethernet ports enable PoE-powered deployment with simultaneous analytics upload. Hardware crypto secures the inference results and prevents model tampering. The 289-LFBGA package suits compact vision modules where PCB real estate is constrained, and Linux support eases integration with cloud analytics platforms.
Recommended
Point-of-Sale (POS) Terminal
The ATSAMA5D26C-CU is well suited for POS terminals, where the 500 MHz Cortex-A5 runs Linux-based payment applications and the integrated peripherals drive touchscreen displays, thermal receipt printers, magnetic-stripe readers, and barcode scanners. The cryptographic accelerator secures PIN entry and transaction data, supporting PCI-PTS hardware requirements. Multiple UART/SPI channels connect to printer and scanner peripherals without glue logic. The compact 14x14 mm BGA package and industrial temperature grade fit the retail-environment operating envelope. Backup-mode current and RTC support real-time-clock functionality for transaction timestamping during power events.
Recommended
Medical Patient Monitor Sub-system
The ATSAMA5D26C-CU serves medical patient monitor sub-systems that require a long-life, low-power MPU for data aggregation, display, and connectivity. The 24-bit LCD controller drives bedside displays; the hardware crypto block secures patient health information (PHI) transmissions. Multiple UARTs connect to SpO2, ECG, NIBP, and temperature sensor modules. The Cortex-A5 core runs medical-grade embedded Linux with RT-Preempt patches for deterministic timing. The -40C to +85C range covers clinical and home-health environments. Hardware tamper pins plus secure boot align with IEC 62443 security requirements for connected medical systems.
Recommended
Recommended Products Summary
Engineering reference data for ATSAMA5D26C-CU β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | ATSAMA5D26C-CNR | ATSAMA5D26B-CU | ATSAMA5D26B-CNR | ATSAMA5D27C-CU | ATSAMA5D26A-CUR | ATSAMA5D26A-CN |
|---|---|---|---|---|---|---|---|
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Package | 289-LFBGA (14x14) | 289-LFBGA (14x14) - same | 289-LFBGA (14x14) - same | 289-LFBGA (14x14) - same | 289-LFBGA (14x14) - same | 289-LFBGA (14x14) - same | 289-LFBGA (14x14) - same |
| Core | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz | ARM Cortex-A5 500 MHz |
| Silicon Revision | C | C (same die, tape-and-reel) | B | B (tape-and-reel) | C (with GPU) | A | A |
| Graphics/GPU Acceleration | Basic LCD controller | Basic LCD controller | Basic LCD controller | Basic LCD controller | 2D GPU + LCD controller | Basic LCD controller | Basic LCD controller |
| Packaging Form | Tray | Tape & Reel | Tray | Tape & Reel | Tray | Tape & Reel | Tray |
| Internal SRAM | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB | 128 KB |
| Hardware Crypto | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG | AES/SHA/TRNG |
Key Differentiators
- Lowest-cost secure Cortex-A5 MPU with hardware crypto in BGA (vs ATSAMA5D28C-CU)
- Same family upgrade path adds 2D GPU without PCB rework (vs ATSAMA5D27C-CU)
- Older silicon revisions still drop-in for supply-constrained situations (vs ATSAMA5D26A-CN)
Design Notes
The 289-LFBGA package uses a 0.8 mm ball pitch and requires a 4-6 layer PCB with microvia (laser-drilled) stack-up. Route signals on the top layer through the BGA escape pattern using dog-bone fanout with via-in-pad recommended for inner rows. Place 0.1 Β΅F decoupling capacitors on every VDD/VBAT pin within 1-2 mm of the ball; group bulk 4.7-10 Β΅F tantalum or ceramic capacitors near the package perimeter. Solid ground and power planes under the BGA reduce impedance and aid thermal dissipation - mandatory for 500 MHz operation.
The ATSAMA5D26C-CU requires a clean 1.2 V core supply capable of 800 mA peak current transients, plus 3.3 V for I/O and analog blocks. Use a low-noise LDO (e.g., Microchip MCP1725 or equivalent) followed by a buck converter to maximize efficiency. Place a 22 Β΅F bulk capacitor near the VDDCORE pins and a ferrite bead between VDDCORE and VDDIO if noise coupling is observed. Power sequencing: VDDIO must come up before or simultaneously with VDDCORE; the device includes power-on-reset logic to manage this, but external sequencing ICs add robustness.
Estimated: at 500 MHz with DDR3L memory in continuous operation, the ATSAMA5D26C-CU dissipates approximately 0.5-0.8 W into the 14x14 mm BGA package. With typical theta_JA of 25-30 C/W on a 4-layer JEDEC test board, junction temperature rises 12-24 C above ambient. Industrial designs at +85 C ambient leave 15-25 C thermal margin to the 100 C Tj max. For sealed enclosures without airflow, consider a thermal pad or copper coin under the package die-expose pad (if accessible) to spread heat into an inner ground plane.
Do not assume all SAMA5D2 boot modes work identically across revisions: B and A revisions have minor errata around USB high-speed PHY and QSPI boot that are fixed in C. Always check the silicon revision errata document (DS80000567) before locking the boot configuration. The secure-boot fuse bits are one-time-programmable - a misconfiguration bricks the device. Use Microchip's sam-ba bootloader or JTAG/SWD for prototype bring-up before sealing fuses.
DDR3L/LPDDR3 memory routing requires length-matched byte lanes (within 25 mil/0.6 mm tolerance) and 100 ohm differential impedance for clock pairs. The SAMA5D2 Hardware Design Considerations application note (DS00003182) provides reference routing topologies and stack-up recommendations. Keep high-speed serial lanes (MIPI CSI-2, RGMII) away from switching power inductors; use ground guards on both sides of the differential pair. Place the 25 MHz main crystal within 5 mm of the XIN/XOUT pins with a guard ring to reduce jitter.
Compliance Information
RoHS/REACH compliant per Microchip product declaration. Not AEC-Q100 qualified (consumer/industrial MPU, not automotive grade). Lead-free and halogen-free per SAMA5D2 family datasheet and Microchip materials declaration.
