CY8C6347FMI-BLD13T - PSoC 63 Dual-Core BLE MCU 1MB Flash | Infineon
MPN: CY8C6347FMI-BLD13T ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $10.42 | $10.42 |
| 10 | $9.38 | $93.80 |
| 100 | $8.33 | $833.00 |
| 500 | $7.29 | $3,645.00 |
| 1,000 | $6.25 | $6,250.00 |
CY8C6347FMI-BLD13T Overview
A PSoC 63 BLE MCU is a system-on-chip combining an ultra-low-power application processor, a radio sub-system, programmable analog and digital blocks (PSoC fabric), and hardware-based security in a single die. It belongs to the broader microcontroller family, sitting between general-purpose MCUs and wireless SoCs. The dual-core architecture lets system firmware run real-time user code on the Cortex-M4 while the M0+ handles radio stack, sensors, and always-on housekeeping, dramatically reducing system power.
Key features include Bluetooth LE 5.x radio with 2 Mbps PHY, 1 MB application flash, 288 KB SRAM, 104-pin WLCSP footprint, hardware crypto accelerators (AES, SHA, TRNG), capacitive touch sensing, USB device, and 12-bit SAR ADC with up to 1 Msps. Independent chip with low-power modes down to deep-sleep current under 5 uA (per Infineon datasheet). The 40 nm process enables aggressive leakage reduction without sacrificing analog performance.
Typical applications include fitness bands and smart watches, BLE-based smart home hubs, asset tracking beacons, wireless sensor nodes, HMI touch panels, and connected medical devices. The wide operating voltage (1.7 V to 9 V battery and Wi-Fi analog frontend (AFE)) supports coin-cell, Li-ion, and USB-powered designs in a single BOM.
When designing with this part, pay attention to WLCSP PCB layout: 0.4 mm pitch requires NSMD pads, microvia-in-pad, and controlled-impedance routing for the antenna. Use Infineon ModusToolbox and the PSoC 63 BSP to leverage the dual-core project template for ARM-based firmware development.
This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet alone.
Drop-in alternatives for CY8C6347FMI-BLD13T — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
CY8C6347FMI-BLD53T
✅ Drop-In📋 Reference alternative (not in catalog)
CY8C6347BZI-BLD13
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
CY8C6347FMI-BLD23T
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
CY8C6348BZI-BLD13T
✅ Drop-In ⚠️ Specs Unverified📋 Reference alternative (not in catalog)
CY8C6347FMI-BLD13T Maximum Ratings & Electrical Characteristics
| Core Architecture | Dual-core ARM Cortex-M4 (150 MHz) + Cortex-M0+ (100 MHz) |
| Flash Memory | 1 MB (1M x 8) |
| SRAM | 288 KB |
| Radio | Bluetooth LE 5.x (2 Mbps PHY supported) |
| Package | 104-WLCSP (3.8 x 5 mm) |
| ADC | 12-bit SAR ADC, up to 1 Msps |
| Touch Sensing | Capacitive touch (CapSense) blocks |
| USB | USB 2.0 Full-Speed Device |
| Security | AES, SHA-256, TRNG, secure boot |
| Mounting Type | Surface Mount (WLCSP, 0.4 mm pitch) |
| RoHS Status | Compliant |
| Family | PSoC 63 BLE |
CY8C6347FMI-BLD13T 104-wlcsp (3.8 x 5 mm) Pin Configuration Guide
Pin configuration for CY8C6347FMI-BLD13T (104-wlcsp (3.8 x 5 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for CY8C6347FMI-BLD13T.
Refer to the datasheet for full pin configuration.
Typical Applications
CY8C6347FMI-BLD13T is suitable for 6 applications: Wearable Fitness Band, BLE Smart Home Sensor Hub, Asset Tracking Beacon, Wireless Industrial HMI Touch Panel, Connected Medical Sensor, USB BLE Dongle for PC Connectivity.
Wearable Fitness Band
The CY8C6347FMI-BLD13T is purpose-built for wearable fitness bands where board area is at a premium and battery life must extend weeks on a single charge. Its 104-WLCSP package measures only 3.8 x 5 mm, leaving room for a coin-cell or Li-Po cell and a BLE antenna trace. The dual-core architecture lets the Cortex-M0+ handle always-on accelerometer sampling and BLE advertising at sub-5 uA deep-sleep current, while the Cortex-M4 wakes on interrupt to run heart-rate algorithm and OLED/HMI rendering. The 1 MB flash accommodates firmware over-the-air (FOTA) update staging, and 288 KB SRAM supports 7-day sensor history buffers without external memory. Hardware AES/SHA accelerators offload secure BLE pairing while TRNG ensures unique key generation per device.
Recommended
BLE Smart Home Sensor Hub
The CY8C6347FMI-BLD13T anchors BLE smart-home hubs and bridges that aggregate data from multiple low-power sensors. Its BLE 5.x radio supports coded PHY for long-range reception from across a typical home, plus 2 Mbps PHY for high-throughput firmware updates. The 12-bit SAR ADC at 1 Msps enables direct interface to analog temperature, humidity, and gas sensors without external ADC ICs, reducing BOM cost. CapSense blocks add touch-button or slider interfaces to wall-mounted hubs. The M4 core runs network-stack and Zephyr/RTOS application code, while M0+ supervises sensor timing and BLE radio coexistence. Hardware crypto and secure boot enable Matter-over-Thread or proprietary encrypted provisioning flows required for smart-home certification.
Recommended
Asset Tracking Beacon
For asset-tracking BLE beacons, the CY8C6347FMI-BLD13T combines low-power operation with BLE advertising flexibility that maximizes battery life while keeping tracking accuracy. The M0+ core can wake periodically to advertise presence (iBeacon or Eddystone) and accelerometer-driven motion events, sleeping deeply the rest of the time. Its 1 MB flash stores unique device certificates and over-the-air firmware update payloads, allowing fleet updates without physical retrieval. The 104-WLCSP package supports miniaturized beacon form factors suitable for tool rental, container, or pallet tracking. Hardware TRNG provides per-device cryptographic identity for tamper-evident supply-chain applications, and the RTC back-up domain keeps timing accurate even across battery swaps.
Recommended
Wireless Industrial HMI Touch Panel
The CY8C6347FMI-BLD13T powers wireless HMI panels in industrial machinery, eliminating control-cabinet cabling. The dual-core M4/M0+ architecture handles real-time capacitive touch sensing (CapSense) and BLE data exchange with a master controller, replacing traditional wired CAN or RS-485 panels. The 1 MB flash supports rich LVGL/Embedded Wizard graphical user interfaces on TFT displays, and 288 KB SRAM enables double-buffered framebuffers at common resolutions. Bluetooth LE 5.x provides robust connectivity through factory floor RF noise, with coded PHY (long range) maintaining link reliability at 30+ meters. The 12-bit SAR ADC interfaces to analog control inputs (potentiometers, joysticks) directly, and hardware AES enables encrypted panel-to-controller authentication.
Recommended
Connected Medical Sensor
For connected medical sensors (pulse oximeters, glucose meters, ECG patches), the CY8C6347FMI-BLD13T delivers the security, accuracy, and low-power operation required by IEC 62304-compliant medical firmware. Its hardware AES, SHA, and secure boot satisfy FDA cybersecurity guidance for medical devices. The 12-bit SAR ADC at 1 Msps digitizes biopotential signals (ECG, EMG) at clinical-grade resolution, while the M4 core runs DSP-style filtering and feature extraction. The BLE radio transmits encrypted patient data to mobile apps or gateways, and 1 MB flash stores device firmware with FOTA update capability. The 104-WLCSP package is suitable for disposable or skin-patch form factors, and deep-sleep under 5 uA extends battery life through multi-day wear periods.
Recommended
USB BLE Dongle for PC Connectivity
The CY8C6347FMI-BLD13T is well-suited for compact USB BLE dongles that add Bluetooth connectivity to PCs, industrial controllers, or legacy equipment. Its integrated USB 2.0 Full-Speed Device controller eliminates the need for an external bridge IC, and the 104-WLCSP package is small enough to fit inside USB-A connector shells. The dual-core architecture runs the BLE host stack (HCI) on the M4 while the M0+ manages radio timing. 1 MB flash stores multiple BLE profiles and HCI command sets, allowing field upgrades via USB DFU. Hardware AES supports secure pairing flows needed by enterprise IT policies, and BLE 5.x coded PHY extends wireless range for industrial docking scenarios.
Recommended
Recommended Products Summary
Engineering reference data for CY8C6347FMI-BLD13T — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | CY8C6347FMI-BLD53T | CY8C6347BZI-BLD13 | CY8C6347FMI-BLD23T | CY8C6348BZI-BLD13T |
|---|---|---|---|---|---|
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Package | 104-WLCSP (3.8x5) | 104-WLCSP (3.8x5) - same | 104-WLCSP (3.8x5) - same | 104-WLCSP (3.8x5) - same | 104-WLCSP (3.8x5) - same |
| Core Architecture | Cortex-M4 (150 MHz) + M0+ (100 MHz) | Cortex-M4 (150 MHz) + M0+ (100 MHz) | Cortex-M4 (150 MHz) + M0+ (100 MHz) | Cortex-M4 (150 MHz) + M0+ (100 MHz) | Cortex-M4 (150 MHz) + M0+ (100 MHz) |
| Flash Memory | 1 MB | 1 MB | 1 MB | 1 MB | 2 MB |
| SRAM | 288 KB | 288 KB | 288 KB | 288 KB | 288 KB |
| Bluetooth LE PHY | BLE 5.x 1 Mbps | BLE 5.x with 2 Mbps PHY | BLE 5.x 1 Mbps | BLE 5.x 1 Mbps (rev2) | BLE 5.x 1 Mbps |
| Security | AES/SHA/TRNG/Secure Boot | AES/SHA/TRNG/Secure Boot | AES/SHA/TRNG/Secure Boot | AES/SHA/TRNG/Secure Boot | AES/SHA/TRNG/Secure Boot |
| ADC | 12-bit SAR, 1 Msps | 12-bit SAR, 1 Msps | 12-bit SAR, 1 Msps | 12-bit SAR, 1 Msps | 12-bit SAR, 1 Msps |
Key Differentiators
- Drop-in 2 Mbps BLE PHY upgrade available (vs CY8C6347FMI-BLD53T)
- Same WLCSP footprint across the family (vs CY8C6348BZI-BLD13T)
- Dual-core ultra-low-power architecture (vs Single-core BLE MCUs in same WLCSP class)
Design Notes
The CY8C6347FMI-BLD13T's 104-WLCSP package uses 0.4 mm pitch. PCB layout MUST use NSMD pads with microvia-in-pad construction for reliable solder joint formation. Per Infineon application note AN210013, maintain 1:1 trace-to-pad ratio on the breakout layer and follow the recommended land pattern in the datasheet. Avoid placing components within 0.5 mm of the WLCSP edge to prevent solder bridging during reflow.
The CY8C6347FMI-BLD13T requires separate analog (VDDA) and digital (VDDD) supplies with proper decoupling. Place 100 nF X7R ceramic capacitors as close as possible to each supply pin, plus a 4.7 uF bulk capacitor on VDDD. Estimated: at peak M4 activity with radio TX, the IC can draw 30-40 mA from VDDD, so the LDO/DCDC must support >= 50 mA continuous. Use Infineon's recommended BOM from the PSoC 63 BSP schematic checklist.
Do not enable the BLE radio before the M0+ core has finished initialization - this causes hard-fault on early PSoC 63 silicon revisions. Always use ModusToolbox 2.x or later with the matching device support package. When migrating firmware between PSoC 63 BLE family variants (BLD13T vs BLD53T), regenerate the BLE stack configuration in the Device Configurator to ensure correct PHY selection and antenna matching network values.
Route the antenna trace with 50 ohm controlled impedance and keep ground plane intact beneath it. Place the antenna at the PCB corner with no ground pour for at least 5 mm clearance in all directions to maximize radiation efficiency. The matching network (typically pi-network with 2.2 nH / 1.5 pF) must be placed close to the RFIO pin. Verify with a VNA after PCB fabrication.
Compliance Information
RoHS compliant per Infineon product page. Not AEC-Q100 qualified - industrial grade MCU for IoT/wearables/medical (consult Infineon for automotive-grade PSoC 6 variants).
