RTAX1000SL-CQ352PROTO - 1M-Gate Rad-Tolerant FPGA | Microchip
MPN: RTAX1000SL-CQ352PROTO ✓ Active| Qty | Unit Price | Extended |
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| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
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Drop-in alternatives for RTAX1000SL-CQ352PROTO — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
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RTAX1000SL-CQ352V
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View Datasheet →RTAX1000SL-CQ352V
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View Datasheet →RTAX1000SL-1CQ352V
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View Datasheet →RTAX2000SL-1CQ352V
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View Datasheet →RTAX4000SL-CQ352PROTO
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View Datasheet →RTAX1000SL-CQ352PROTO Maximum Ratings & Electrical Characteristics
| Family | RTAX-S/SL Radiation-Tolerant FPGAs |
| Equivalent System Gates | 1,000,000 |
| Logic Cells | 18144 |
| CLBs | 12096 |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) |
| Process Technology | CMOS 0.15 um |
| Configuration Technology | Antifuse (one-time programmable), live at power-up |
| Package | 352-terminal ceramic metal-sealed cofired CQFP (CQ352) |
| Operating Temperature | -55C to +125C |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic |
| Clock Architecture | Segmentable clocks, chip-wide highway routing |
| Carry Chains | Yes (arithmetic carry support) |
| Application Space | Space-flight systems, radiation-tolerant |
| Build Variant | PROTO (prototyping/engineering build) |
| Mounting Type | Surface Mount |
RTAX1000SL-CQ352PROTO 352-terminal ceramic metal-sealed cofired cqfp (cq352) Pin Configuration Guide
Complete pinout information for RTAX1000SL-CQ352PROTO (352-terminal ceramic metal-sealed cofired cqfp (cq352) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for RTAX1000SL-CQ352PROTO.
Refer to the datasheet for full pin configuration.
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
RTAX1000SL-CQ352PROTO is suitable for 6 applications: Satellite Payload Data Processing, Spacecraft Bus Control and Housekeeping, Telemetry and Telecommand Interfaces, Radiation-Tolerant Signal Processing, Flight Prototype and Engineering Model Development, New Space and Small Satellite Avionics.
Satellite Payload Data Processing
The RTAX1000SL-CQ352PROTO fits satellite payload data processing because its 1,000,000 equivalent gates and 18,144 logic cells provide enough fabric for data formatting, framing, and compression pipelines while its antifuse fabric is live at power-up - critical for payloads that must begin operating without a configuration sequence. Its CMOS 0.15um process at a 1.5V nominal core keeps dynamic power low, which directly reduces the solar-array and battery budget of the spacecraft. In a typical payload chain the FPGA sits between the sensor or downconverter and the downlink formatter, using embedded SRAM FIFOs to buffer rate-mismatched data streams. Because the device is one-time programmable, the PROTO build allows engineers to validate the payload processing pipeline on flight-representative silicon before ordering screened flight units, de-risking the program schedule.
Recommended
Spacecraft Bus Control and Housekeeping
Spacecraft bus controllers demand deterministic startup and minimal parts count; the RTAX1000SL-CQ352PROTO delivers both through live-at-power-up antifuse configuration, eliminating the external configuration PROM that SRAM FPGAs require and removing a single point of failure. The 1.5V nominal supply (1.425V-1.575V) and low static power suit always-on housekeeping electronics that operate throughout eclipse periods. Segmentable clocks and chip-wide highway routing allow the bus controller, watchdog functions, and mode control to coexist in one 1M-gate device, replacing glue logic across a -55C to +125C temperature range. The hermetic ceramic metal-sealed CQFP-352 package supports the outgassing and hermeticity requirements of bus avionics, and the PROTO variant lets integration teams bring up the bus board before committing screened flight parts.
Recommended
Telemetry and Telecommand Interfaces
Telemetry/telecommand (TM/TC) electronics benefit from the RTAX1000SL-CQ352PROTO's combination of embedded SRAM with built-in FIFO control logic and carry-chain arithmetic, which implement CCSDS-style framing, encoders, and CRC generation efficiently within 12,096 CLBs. Because antifuse configuration is immune to configuration-memory upsets, the TM/TC function - which must remain reachable even after a radiation event - retains its integrity without requiring scrubbing hardware, unlike SRAM FPGA implementations. The 352-pin CQFP provides sufficient I/O to bridge redundant MIL-STD-style serial interfaces, LVDS banks, and discrete commanding lines on one chip. Designers typically prototype the complete TM/TC state machine on the PROTO build, then migrate the verified netlist to the RTAX1000SL-CQ352V flight ordering code using Microchip's footprint-compatible migration flow.
Recommended
Radiation-Tolerant Signal Processing
For onboard signal processing such as filtering, FFT and correlation, the RTAX1000SL-CQ352PROTO offers dedicated carry chains for arithmetic and embedded SRAM blocks with FIFO control for sample buffering, inherited from the commercial Axcelerator architecture. The 1M-gate density accommodates moderate-throughput DSP datapaths - channelized filtering, detector readout conditioning - at a fraction of the power of a general-purpose processor chain, thanks to the 1.5V core and 0.15um CMOS process. Antifuse routing also exhibits no configuration-cell SEU behavior, simplifying the dependability case for processing functions whose outputs feed downstream decision logic. Engineers use the PROTO part to validate fixed-point datapaths against bit-true models on the actual fabric, then transfer the timing-signed-off design to flight-screened RTAX1000SL CQ352 variants.
Recommended
Flight Prototype and Engineering Model Development
The primary purpose of the PROTO suffix is engineering-model and board bring-up work. The RTAX1000SL-CQ352PROTO carries the same die, package, and pinout class as flight units, so power distribution, decoupling, I/O termination, and signal integrity validated on the PROTO board are directly representative of flight hardware. Teams can run the full Libero SoC place-and-route flow, exercise antifuse programming procedures, and rehearse manufacturing test before scarce flight-screened parts (such as RTAX1000SL-CQ352V) are committed. Microchip's documented prototyping methodology for RTAX-S/SL, including the footprint-compatible adaptor board approach and EDIF netlist/pinout conversion, applies here. This separates development risk from flight risk: any design change discovered on the PROTO is absorbed at PROTO cost, protecting the flight schedule.
Recommended
New Space and Small Satellite Avionics
Small satellite and New Space platforms need rad-tolerant logic with commercial-program responsiveness; the RTAX1000SL-CQ352PROTO serves this market by providing 1M radiation-tolerant gates in a true single-chip, live-at-power-up package with low power draw from a 1.5V rail. The 352-terminal CQFP mounts on standard ceramic-assembly processes, and its single-device integration of control, telemetry, and payload-interface logic reduces board area and assembly cost for compact avionics stacks. Because the antifuse fabric needs no boot PROM or scrubbing controller, onboard software complexity and rad-hard microcontroller overhead are reduced. CubeSat and smallsat teams typically procure PROTO builds for attitude-control and communication board development, then order flight-screened RTAX1000SL CQ352 codes once the design freezes, aligning procurement with launch certification milestones.
Recommended
Recommended Products Summary
Engineering reference data for RTAX1000SL-CQ352PROTO — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | RTAX1000SL-CQ352V | RTAX1000SL-CQ352 | RTAX1000SL-1CQ352V | RTAX2000SL-1CQ352V | RTAX4000SL-CQ352PROTO |
|---|---|---|---|---|---|---|
| Package | CQFP-352 (CQ352) ceramic | CQFP-352 - same | CQFP-352 - same | CQFP-352 - same | CQFP-352 - same | CQFP-352 - same |
| Brand | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology | Microchip Technology |
| Equivalent System Gates | 1,000,000 | 1,000,000 | 1,000,000 | 1,000,000 | [DATA_NEEDED] | [DATA_NEEDED] |
| Logic Cells | 18144 | 18144 | 18144 | 18144 | [DATA_NEEDED] | [DATA_NEEDED] |
| Core Supply Voltage | 1.5 V nominal | 1.5 V nominal | 1.5 V nominal | 1.5 V nominal | 1.5 V nominal | 1.5 V nominal |
| Speed Grade | Standard | Standard | Standard | Speed grade 1 (faster) | Speed grade 1 | Standard |
| Screening / Build Flow | PROTO (engineering build) | V screening flow | Standard flow | V screening flow | V screening flow | PROTO (engineering build) |
| Configuration Technology | Antifuse, live at power-up | Antifuse | Antifuse | Antifuse | Antifuse | Antifuse |
| Drop-in Interchangeability | Reference | Yes - identical die | Yes - identical die | Yes - identical die | Netlist migration required | Netlist migration required |
Key Differentiators
- Identical die to flight units at prototyping economics (vs RTAX1000SL-CQ352V)
- Lowest-risk density on the shared CQ352 footprint (vs RTAX2000SL-1CQ352V)
- Single-chip live-at-power-up operation (vs RTAX1000SL-CQ352)
- Cost optimization vs speed-grade 1 variants (vs RTAX1000SL-1CQ352V)
Design Notes
Estimated: with a 1.5V nominal core (range 1.425V-1.575V), tolerance band is only +/-5%, so design the core rail with tight regulation and robust decoupling. Antifuse FPGAs draw a programming inrush transient during device programming; ensure the programmer supply and board regulation can support the datasheet programming current profile. Because static power in the 0.15um CMOS fabric is low, budget primarily for dynamic power computed in Libero SoC power analysis for your actual netlist - generic spreadsheets understate real switching activity.
The RTAX1000SL is one-time programmable: after antifuse programming there is no design iteration on that device. Complete functional simulation, back-annotated timing sign-off, and DRC in Libero SoC before any programming attempt. Never use flight-screened parts for first-pass hardware debug - that is exactly what the PROTO build exists for. Also confirm pinout against the CQ352-specific table in the RTAX-S/SL datasheet (ds2169); pin assignments differ between RTAX package options and copying layouts from other packages will break the board.
Follow the CQFP-352 land pattern from the Microchip package drawing exactly; ceramic cofired packages have tighter tolerances than plastic QFPs and need attention to coplanarity during reflow or socket mounting. For space boards, add series termination on high-speed I/O banks and follow the manufacturer application note guidance on I/O bank decoupling. When planning future density migration (e.g., to RTAX2000SL or RTAX4000SL on CQ352), reserve the footprint-compatibility margin described in the datasheet's migration methodology so an adaptor-board change is sufficient.
Segment the clocks deliberately: the RTAX-S/SL fabric offers segmentable clock resources and chip-wide highway routing, so map each clock domain to the appropriate segment instead of forcing everything onto global resources, which increases skew and power. Keep the embedded-SRAM FIFO interfaces physically close to their consuming logic blocks to shorten high-fanout routing. Verify clock skew with back-annotated timing rather than pre-layout estimates, since antifuse routing delays dominate in this architecture and cannot be tuned after programming.
Compliance Information
Space-grade ceramic hermetic package; specific RoHS/REACH declarations were not present in the provided web data and must be obtained from Microchip product compliance documentation.
