STM32F765IGT6 - 216MHz Cortex-M7 MCU, 1MB Flash | STMicroelectronics
MPN: STM32F765IGT6 ✓ Active| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $20.91 | $20.91 |
| 10 | $19.55 | $195.50 |
| 100 | $17.85 | $1,785.00 |
| 500 | $16.2 | $8,100.00 |
| 1,000 | $14.6 | $14,600.00 |
| 3,000 | $13.1 | $39,300.00 |
STM32F765IGT6 Overview
Key features include a single-precision and double-precision FPU, L1 cache (16 KB I-cache + 16 KB D-cache), ART Accelerator for flash execution, a Chrom-ART accelerator for 2D graphics, and a JPEG codec. The device integrates extensive connectivity peripherals including three USB 2.0 OTG ports (one with HS PHY), two CAN 2.0B interfaces, an IEEE 802.3-compliant 10/100 Ethernet MAC with dedicated DMA, three I2S interfaces, six SPI ports, and SDMMC support, making it suitable for networked embedded and multimedia applications.
The STM32F765 belongs to the Cortex-M7-based STM32F7 family, which targets high-performance embedded applications above the Cortex-M4 tier. Compared with Cortex-M4, the Cortex-M7 superscalar core adds branch prediction, SIMD instructions, and tightly-coupled L1 caches, achieving roughly 2x Dhrystone performance per MHz. The F765 position relative to its siblings F767/F769 brings graphics (Chrom-ART, LTDC, JPEG), Ethernet, USB HS, and DSI while keeping the cost-effective LQFP-176 rather than the higher-pin-count BGA packages.
Memory architecture: 1 MB of dual-bank Flash with read-while-write support enables firmware upgrades without downtime, and 512 KB of SRAM is split into 368 KB of general-purpose SRAM plus dedicated 16 KB instruction TCM and 16 KB data TCM for time-critical code. Peripherals include three 12-bit ADCs at 2.4 MSPS each, two 12-bit DACs, multiple timers including HRTIM for power conversion, a 32-bit RTC, and AES-256 + True Random Number Generator hardware cryptography.
Typical applications include industrial motor-control and fieldbus nodes, networked gateways and IoT edge devices, graphical HMI panels, audio processing, and high-speed data acquisition. The integrated Ethernet MAC with dedicated DMA enables deterministic real-time networking, while the USB HS PHY simplifies data-loading designs.
Design consideration: decoupling is critical - place one 100 nF ceramic per VDD/VDDA pin pair as close as possible, and provide a 4.7 uF bulk capacitor near the regulator. Configure the BOOT0 pin via a 10 kohm pull-down plus a small capacitor to ground to filter transient glitches.
This page synthesizes distributor pricing, verified drop-in alternatives within the LQFP-176 family, and field-ready design notes not found on a single datasheet page.
Drop-in alternatives for STM32F765IGT6 — same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Variants in this series
Same-series models that are drop-in compatible with STM32F765IGT6 (same form factor and footprint) — differing in Flash Memory, SRAM, Operating Temperature, Package, ADC.
Quick Comparison Tool — Select alternative parts for side-by-side comparison:
STM32F767IGT6
✅ Drop-In📋 Reference alternative (not in catalog)
STM32F745IGT6
✅ Drop-In📋 Reference alternative (not in catalog)
STM32H743IIT6
✅ Drop-In✓ In Stock
$12 / Unit
View Datasheet →STM32F769NIH6
✅ Drop-In✓ In Stock
$15.85 / Unit
View Datasheet →GD32F450IIH6
✅ Drop-In📋 Reference alternative (not in catalog)
STM32F765IGT6 Maximum Ratings & Electrical Characteristics
| Core | ARM Cortex-M7 with FPU (single + double precision) |
| Maximum CPU Frequency | 216 MHz |
| DMIPS / CoreMark | 462 DMIPS / 1082 CoreMark |
| Flash Memory | 1 MB (1 Mbyte), dual-bank with read-while-write |
| SRAM | 512 KB total (368 KB SRAM + 16 KB ITCM + 16 KB DTCM) |
| Supply Voltage | 1.7 V to 3.6 V |
| Package | 176-LQFP (24x24 mm) |
| Operating Temperature Range | -40C to +85C |
| USB Interfaces | 3 x USB 2.0 OTG (1 x HS with on-chip PHY) |
| Ethernet | IEEE 802.3 10/100 MAC with dedicated DMA (MII/RMII) |
| CAN | 2 x CAN 2.0B Active |
| SPI | 6 x SPI interfaces |
| I2C | 3 x I2C interfaces |
| UART/USART | 4 x USART + 4 x UART |
| ADC | 3 x 12-bit ADC up to 2.4 MSPS |
| DAC | 2 x 12-bit DAC |
| Hardware Crypto | AES-256, TRNG, Hash (SHA-1, SHA-224/256), Unique 96-bit ID |
| Graphics Acceleration | Chrom-ART (DMA2D), JPEG codec, optional LCD-TFT controller |
| MSL Level | 3 (168 hours) |
| RoHS Status | Compliant (Ecopack2) |
STM32F765IGT6 176-lqfp (24x24 mm) Pin Configuration Guide
Pin configuration for STM32F765IGT6 (176-lqfp (24x24 mm) package). This digital IC includes GPIO, communication interfaces (UART, SPI, I2C), and power pins. Refer to the manufacturer datasheet for alternate pin functions and configuration options. Essential for embedded system design and PCB layout.
No detailed pinout data available for STM32F765IGT6.
Refer to the datasheet for full pin configuration.
Typical Applications
STM32F765IGT6 is suitable for 6 applications: Industrial Ethernet Gateways, Human-Machine Interface (HMI) with Graphics, Audio and DSP Processing, Motor Control and Power Conversion, Networked IoT Edge Node, Industrial HMI Touch Display.
Industrial Ethernet Gateways
The STM32F765IGT6 fits industrial Ethernet gateway designs because it integrates an IEEE 802.3 10/100 MAC with dedicated DMA that frees the 216 MHz Cortex-M7 core from descriptor overhead, sustaining Modbus TCP, EtherNet/IP, and PROFINET packet rates while running the user stack. In a typical Profinet device the F765 routes 8 ms of clock-edge jitter through its Ethernet DMA, while the on-chip USB HS PHY supplies commissioning/logging channels without an external ULPI bridge. Compared with a Cortex-M4 in the same role, F765 doubles loop-back throughput and reduces the worst-case frame latency thanks to DTCM-backed zero-wait-state firmware. Designers typically populate 4.7 uF bulk + 100 nF per VDD pair near the LGA pads, and split analog AGND/REG-GND with a ferrite bead to keep Ethernet PHY bias stable.
Recommended
Human-Machine Interface (HMI) with Graphics
The STM32F765IGT6's Chrom-ART DMA2D accelerator offloads rectangular fills and alpha-blended UI layers, freeing the Cortex-M7 to handle TouchGFX widgets and FreeRTOS scheduling, while the integrated JPEG codec decodes dashboard imagery directly from SPI NOR flash with no external decoder IC needed. A typical 4.3 inch 480x272 RGB panel renders fast enough to drive from internal SRAM-allocated framebuffers with double-buffering at >30 fps. Compared with a Cortex-M4 host MCU at the same MHz, Chrom-ART yields 3-5x frame-composition speed-up. The 1 MB dual-bank Flash enables background image updates for OTA display-content refresh without halting the UI loop, and SDRAM not required for under-640x480 targets.
Recommended
Audio and DSP Processing
The STM32F765IGT6 executes Cortex-M7 SIMD and floating-point instructions on 16 KB ITCM + 16 KB DTCM code paths with single-cycle access, sustaining up to 462 DMIPS for audio DSP workloads such as AEC, ANC, and processing on PDM MEMS microphone arrays. The three I2S peripherals drive DAC/ADC codecs directly while SAI supports multi-channel TDM for digital microphone stitching. Compared with Cortex-M4 parts at half the silicon, F765 achieves roughly 2x audio-pipeline throughput per MHz thanks to dual-issue fetch and DSP SIMD instructions. Sample implementations include voice-front-end inference at 16 kHz with cycle budgets under 25% utilization, leaving headroom for user application and OS scheduling.
Recommended
Motor Control and Power Conversion
The STM32F765IGT6's HRTIM peripheral produces 5.5 ps-resolution PWM required for field-oriented control (FOC) of PMSM motors up to several kW, while the symmetric pair of 12-bit ADCs at 2.4 MSPS sample phase currents at line-edge precision for shunt-based current sensing. FOC on the Cortex-M7 at 216 MHz achieves 50 us cycle time on a 4-pole motor - fast enough for high-speed operation above 30 krpm without compromising the current loop. The Chrom-ART accelerator can be repurposed via DMA to refresh display panels of VFD- or 7-segment-based field devices. Use the SDMMC for parameter-storage as an alternative to SPI EEPROM where densities exceed 32 MB.
Recommended
Networked IoT Edge Node
The STM32F765IGT6's Cortex-M7 core runs TinyML inference engines and SSL/TLS stacks while Ethernet MAC plus USB HS PHY handle the gateway IoT backhaul on the same silicon - no external MCU/MPU required for many edge designs. The 512 KB SRAM comfortably fits TensorFlow Lite for Microcontrollers with quantized MobileNet models plus TLS buffers concurrently. Compared with Cortex-M33 alternatives, F765's M7 dual-issue at 216 MHz yields roughly 1.5x inference speed-up and stronger software-ecosystem reuse via STM32CubeIDE and -PAzureRTOS real-time guarantees.
Recommended
Industrial HMI Touch Display
The STM32F765IGT6 integrates just enough peripherals to skip external bridge ICs - SPI NOR holds LVGL/Embedded Wizard artifacts, SDRAM-less framebuffer suffices for QVGA, and the USB HS port hosts firmware updates plus touch-controller data from off-board FT5426 capacitive touch layer. Combined with a 5-inch TFT panel driven via SPI + RGB, Chrom-ART cuts GPU load during dynamic-graph redraws. Compared with a Cortex-M4 host MCU, F765 achieves 2-3x redraw rate thanks to single-precision float in matrix transforms for LVGL animation paths.
Recommended
Recommended Products Summary
Engineering reference data for STM32F765IGT6 — comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | STM32F767IGT6 | STM32F745IGT6 | STM32H743IIT6 | STM32F769NIH6 | GD32F450IIH6 |
|---|---|---|---|---|---|---|
| Brand | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | STMicroelectronics | GigaDevice |
| Package | 176-LQFP (24x24) | 176-LQFP (24x24) | 176-LQFP (24x24) | 176-LQFP (24x24) | TQFP-176 (24x24) | 176-LQFP (24x24) |
| Core | Cortex-M7 @ 216 MHz | Cortex-M7 @ 216 MHz | Cortex-M7 @ 200 MHz | Cortex-M7 @ 480 MHz | Cortex-M7 @ 216 MHz | Cortex-M4F @ 200 MHz |
| Flash | 1 MB | 2 MB | 1 MB | 2 MB | 2 MB | 3 MB |
| SRAM | 512 KB | 512 KB | 256 KB | 1 MB | 512 KB | 256 KB |
| Ethernet MAC | Yes (10/100 with DMA) | Yes (10/100 with DMA) | No | Yes (10/100 with DMA) | Yes (10/100 with DMA) | No (ENET MAC, no DMA) |
| USB HS PHY | Yes (on-chip) | Yes (on-chip) | Yes (on-chip) | Yes (on-chip) | Yes (on-chip) | No |
| Chrom-ART (DMA2D) | Yes | Yes | Yes | Yes | Yes | No |
| Approx. unit price (qty 1) | $20.91 | $24-$26 | $15-$17 | $22-$25 | $30-$34 | $8-$10 |
Key Differentiators
- Best balance of 216 MHz Cortex-M7 with on-chip USB HS PHY and 1 MB dual-bank Flash in LQFP-176 (vs STM32H743IIT6)
- On-chip USB HS PHY + dedicated Ethernet DMA in the same LQFP-176 device (vs STM32F745IGT6)
- Integrated 2 MB Flash with same package AND same peripherals - drop-in scale up to the STM32F767 (vs STM32F767IGT6)
Design Notes
Estimated: Decoupling budget for the STM32F765IGT6 requires one 100 nF X7R 0402 ceramic per VDD/VDDA/VDD_USB pin pair, plus a 4.7 uF X5R bulk within 5 mm of the LDO output. Without sufficient bulk capacitance during 480 mA Ethernet bursts the regulator will drop below 1.7 V and the core will reset. Always allocate VDD_USB (USB PHY supply) a separate 100 nF and 10 uF filter rather than tying it to digital VDD - the HS PHY injects heavy high-frequency harmonics.
Estimated: At full compute load with FPU + caches simultaneously active and an ambient temperature of 85C, the STM32F765IGT6 junction temperature stays below 100C thanks to the LQFP-176 padless thermal path dissipating ~30 C/W in still air. Designers should resist limiting the clock to less than 216 MHz purely on thermal grounds - typical industrial designs land between 110-130C junction under worst-case loads, which is well within AEC-Q100-like margins for industrial -40 to 85C projects.
Layout requirement: keep the 50-ohm Ethernet RMII/MII trace impedance controlled to within +-10% via 4-layer stack-up, and keep the differential pair within 200 mils of the DP83848I or LAN8742A PHY. The SDMMC bus should be 50-ohm characteristic and stay short of high-current switching nodes; the SPI lines for the LCD panel must be length-matched within 50 mils. XAIPART's STM32 reference designs at 176-LQFP can serve as a starting template.
Common pitfalls: (1) leaving PA13/PA14 (SWDIO/SWCLK) floating - they must each have a 100 kohm pull-up to avoid random debugger attach. (2) Driving NRST directly with a logic gate during reset - use an open-drain supervisor (e.g., STM6315) for clean power-on behavior. (3) Forgetting to enable the SYSCFG clock before configuring EXTI lines - this is the most common cause of port-interrupts-not-firing on STM32 designs.
Compliance Information
STM32F765IGT6 is RoHS compliant (Ecopack2), industrial grade -40 to +85C. Not AEC-Q100 qualified; for automotive choose STM32F765IGT6W (AEC-Q100) or STM32F765IGT7 (extended temp).
