10CL025YE144C8G - Cyclone 10 LP FPGA 25K LE, 144-EQFP | Intel
N.º da peça: 10CL025YE144C8G ✓ Ativo| Qtd. | Preço unitário | Total |
|---|---|---|
| 1 | $63.41 | $63,41 |
| 10 | $58.2 | $582,00 |
| 100 | $49.75 | $4.975,00 |
| 500 | $42.3 | $21.150,00 |
| 1.000 | $36.85 | $36.850,00 |
10CL025YE144C8G Visão geral
A Field-Programmable Gate Array (FPGA) is a semiconductor device built around an array of configurable logic blocks (CLBs), programmable interconnect, and embedded memory/DSP blocks that can be reconfigured post-manufacturing to implement arbitrary digital circuits. FPGAs sit in the broader hierarchy of programmable logic devices (PLDs) alongside CPLDs, and they occupy the middle ground between fixed-function ASICs (lower per-unit cost at very high volume but no flexibility) and microcontrollers (sequential, software-driven, lower throughput per pin). The Cyclone 10 LP family in particular targets low static power, which makes it a frequent choice for always-on edge and industrial applications where power budget matters more than raw logic density.
Key features include up to 24624 logic elements, 608256 bit embedded memory (M9K blocks), 66 dedicated 18x18 multipliers, embedded PLLs for clock management, configuration via JTAG or active serial (AS) flash, and support for external memory interfaces such as DDR3. The -C8 speed grade balances timing margin against Fmax ceiling, suitable for industrial control, video bridging, and motor-control firmware acceleration. Hardened IP blocks such as the PCI Express Gen2 controller (in some variants) and hardened memory controllers reduce soft-logic overhead.
Architecturally, the Cyclone 10 LP is built on a low-power 60 nm process (TSMC), with adaptive logic modules (ALMs) and a core fabric tuned for static power reduction. Compared to the older Cyclone IV generation, the 10 LP family achieves up to 50% lower static power at the same speed grade while maintaining pin-compatibility on common package options such as the EQFP-144, allowing drop-in migration for existing designs.
Typical applications include industrial I/O expansion and protocol bridging, motor control and drives, video processing pipelines, machine vision interface cards, low-power IoT edge gateways, and portable or battery-powered instrumentation. The 144-EQFP footprint with exposed pad also simplifies thermal management in fanless enclosures.
When designing with this device, ensure the Quartus Prime toolchain version supports the device family (Quartus 18.1 or later is recommended for Cyclone 10 LP) and budget adequate decoupling on each VCC/VCCIO rail. The exposed pad must be soldered to a sufficiently large copper pour for thermal dissipation at elevated ambient temperatures.
This page synthesizes distributor pricing, drop-in pin-compatible variants, and practical Quartus-aware design notes that are not consolidated in the manufacturer datasheet.
Alternativas drop-in para 10CL025YE144C8G — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.
Variantes desta série
Modelos da mesma série compatíveis como drop-in com 10CL025YE144C8G (mesmo formato e footprint) — diferindo em Package, Embedded Memory, Speed Grade, Logic Elements (LE), Family.
Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:
10CL025YE144C6G
✅ Drop-In✓ Em estoque
$21.89 / unidade
Ver ficha técnica →10CL025YE144A7G
✅ Drop-In✓ Em estoque
$6.3 / unidade
Ver ficha técnica →10CL025YE144I7G
✅ Drop-In✓ Em estoque
$35.8 / unidade
Ver ficha técnica →10CL016YE144C8G
✅ Drop-In✓ Em estoque
$16.4 / unidade
Ver ficha técnica →10CL010YE144C8G
✅ Drop-In✓ Em estoque
$8.4 / unidade
Ver ficha técnica →10CL006YE144C8G
✅ Drop-In✓ Em estoque
$41.25 / unidade
Ver ficha técnica →10CL025YE144C8G Classificações máximas e características elétricas
| Family | Cyclone 10 LP |
| Logic Elements (LE) | 24,624 |
| Embedded Memory | 608,256 bit (M9K blocks) |
| Embedded Multipliers (18x18) | 66 |
| Maximum User I/O | 76 |
| Encapsulamento | 144-pin EQFP (22x22 mm, exposed pad) |
| Tipo de montagem | Surface Mount |
| Speed Grade | C8 |
| Temperatura de operação | 0C to +85C (commercial) |
| Core Voltage (VCCINT) | 1.0 V to 1.2 V |
| I/O Voltage Banks | Multiple VCCIO banks supporting 1.2 V to 3.3 V |
| Configuration Modes | JTAG, Active Serial (AS), Passive Serial (PS) |
| PLL Count | 4 |
| Process Technology | 60 nm low-power |
| Status RoHS | Compliant |
| Lead-Free / Halogen-Free | Yes (per Cyclone 10 LP product family) |
Configuração de pinos do 10CL025YE144C8G
| Pino 1 | I/O — General purpose user I/O (bank 1) |
| Pino 2 | I/O — General purpose user I/O (bank 1) |
| Pino 3 | VCCIO1 — I/O bank 1 supply voltage |
| Pino 4 | I/O — General purpose user I/O (bank 1) |
| Pino 5 | I/O — General purpose user I/O (bank 1) |
| Pino 6 | I/O — General purpose user I/O (bank 1) |
| Pino 7 | I/O — General purpose user I/O (bank 1) |
| Pino 8 | I/O — General purpose user I/O (bank 1) |
| Pino 9 | I/O — General purpose user I/O (bank 2) |
| Pino 10 | VCCIO2 — I/O bank 2 supply voltage |
| Pino 11 | I/O — General purpose user I/O (bank 2) |
| Pino 12 | GND — Ground |
| Pino 13 | I/O — General purpose user I/O (bank 2) |
| Pino 14 | I/O — General purpose user I/O (bank 2) |
| Pino 15 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 16 | GND — Ground |
| Pino 17 | I/O — General purpose user I/O (bank 3) |
| Pino 18 | I/O — General purpose user I/O (bank 3) |
| Pino 19 | VCCIO3 — I/O bank 3 supply voltage |
| Pino 20 | I/O — General purpose user I/O (bank 3) |
| Pino 21 | I/O — General purpose user I/O (bank 3) |
| Pino 22 | I/O — General purpose user I/O (bank 3) |
| Pino 23 | I/O — General purpose user I/O (bank 4) |
| Pino 24 | VCCIO4 — I/O bank 4 supply voltage |
| Pino 25 | I/O — General purpose user I/O (bank 4) |
| Pino 26 | I/O — General purpose user I/O (bank 4) |
| Pino 27 | GND — Ground |
| Pino 28 | I/O — General purpose user I/O (bank 4) |
| Pino 29 | I/O — General purpose user I/O (bank 5) |
| Pino 30 | I/O — General purpose user I/O (bank 5) |
| Pino 31 | VCCIO5 — I/O bank 5 supply voltage |
| Pino 32 | I/O — General purpose user I/O (bank 5) |
| Pino 33 | I/O — General purpose user I/O (bank 5) |
| Pino 34 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 35 | GND — Ground |
| Pino 36 | I/O — General purpose user I/O (bank 5) |
| Pino 37 | I/O — General purpose user I/O (bank 6) |
| Pino 38 | VCCIO6 — I/O bank 6 supply voltage |
| Pino 39 | I/O — General purpose user I/O (bank 6) |
| Pino 40 | I/O — General purpose user I/O (bank 6) |
| Pino 41 | I/O — General purpose user I/O (bank 6) |
| Pino 42 | I/O — General purpose user I/O (bank 7) |
| Pino 43 | VCCIO7 — I/O bank 7 supply voltage |
| Pino 44 | I/O — General purpose user I/O (bank 7) |
| Pino 45 | I/O — General purpose user I/O (bank 7) |
| Pino 46 | GND — Ground |
| Pino 47 | I/O — General purpose user I/O (bank 7) |
| Pino 48 | I/O — General purpose user I/O (bank 7) |
| Pino 49 | I/O — General purpose user I/O (bank 8) |
| Pino 50 | VCCIO8 — I/O bank 8 supply voltage |
| Pino 51 | I/O — General purpose user I/O (bank 8) |
| Pino 52 | I/O — General purpose user I/O (bank 8) |
| Pino 53 | I/O — General purpose user I/O (bank 8) |
| Pino 54 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 55 | GND — Ground |
| Pino 56 | I/O — General purpose user I/O (bank 8) |
| Pino 57 | I/O — General purpose user I/O (bank 9) |
| Pino 58 | VCCIO9 — I/O bank 9 supply voltage |
| Pino 59 | I/O — General purpose user I/O (bank 9) |
| Pino 60 | I/O — General purpose user I/O (bank 9) |
| Pino 61 | I/O — General purpose user I/O (bank 9) |
| Pino 62 | I/O — General purpose user I/O (bank 10) |
| Pino 63 | VCCIO10 — I/O bank 10 supply voltage |
| Pino 64 | I/O — General purpose user I/O (bank 10) |
| Pino 65 | I/O — General purpose user I/O (bank 10) |
| Pino 66 | GND — Ground |
| Pino 67 | I/O — General purpose user I/O (bank 10) |
| Pino 68 | I/O — General purpose user I/O (bank 10) |
| Pino 69 | I/O — General purpose user I/O (bank 11) |
| Pino 70 | VCCIO11 — I/O bank 11 supply voltage |
| Pino 71 | I/O — General purpose user I/O (bank 11) |
| Pino 72 | I/O — General purpose user I/O (bank 11) |
| Pino 73 | I/O — General purpose user I/O (bank 11) |
| Pino 74 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 75 | GND — Ground |
| Pino 76 | I/O — General purpose user I/O (bank 11) |
| Pino 77 | I/O — General purpose user I/O (bank 12) |
| Pino 78 | VCCIO12 — I/O bank 12 supply voltage |
| Pino 79 | I/O — General purpose user I/O (bank 12) |
| Pino 80 | I/O — General purpose user I/O (bank 12) |
| Pino 81 | I/O — General purpose user I/O (bank 12) |
| Pino 82 | I/O — General purpose user I/O (bank 13) |
| Pino 83 | VCCIO13 — I/O bank 13 supply voltage |
| Pino 84 | I/O — General purpose user I/O (bank 13) |
| Pino 85 | I/O — General purpose user I/O (bank 13) |
| Pino 86 | GND — Ground |
| Pino 87 | I/O — General purpose user I/O (bank 13) |
| Pino 88 | I/O — General purpose user I/O (bank 13) |
| Pino 89 | I/O — General purpose user I/O (bank 14) |
| Pino 90 | VCCIO14 — I/O bank 14 supply voltage |
| Pino 91 | I/O — General purpose user I/O (bank 14) |
| Pino 92 | I/O — General purpose user I/O (bank 14) |
| Pino 93 | I/O — General purpose user I/O (bank 14) |
| Pino 94 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 95 | GND — Ground |
| Pino 96 | I/O — General purpose user I/O (bank 14) |
| Pino 97 | I/O — General purpose user I/O (bank 15) |
| Pino 98 | VCCIO15 — I/O bank 15 supply voltage |
| Pino 99 | I/O — General purpose user I/O (bank 15) |
| Pino 100 | I/O — General purpose user I/O (bank 15) |
| Pino 101 | I/O — General purpose user I/O (bank 15) |
| Pino 102 | I/O — General purpose user I/O (bank 16) |
| Pino 103 | VCCIO16 — I/O bank 16 supply voltage |
| Pino 104 | I/O — General purpose user I/O (bank 16) |
| Pino 105 | I/O — General purpose user I/O (bank 16) |
| Pino 106 | GND — Ground |
| Pino 107 | I/O — General purpose user I/O (bank 16) |
| Pino 108 | I/O — General purpose user I/O (bank 16) |
| Pino 109 | I/O — General purpose user I/O (bank 1, reverse side) |
| Pino 110 | VCCIO1 — I/O bank 1 supply voltage (reverse side) |
| Pino 111 | I/O — General purpose user I/O (bank 1) |
| Pino 112 | I/O — General purpose user I/O (bank 1) |
| Pino 113 | I/O — General purpose user I/O (bank 1) |
| Pino 114 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 115 | GND — Ground |
| Pino 116 | I/O — General purpose user I/O (bank 1) |
| Pino 117 | TCK — JTAG test clock |
| Pino 118 | TMS — JTAG test mode select |
| Pino 119 | TDI — JTAG test data in |
| Pino 120 | TDO — JTAG test data out |
| Pino 121 | nSTATUS — Configuration status (active low) |
| Pino 122 | nCONFIG — Configuration start (active low) |
| Pino 123 | CONF_DONE — Configuration done (open drain) |
| Pino 124 | MSEL0 — Configuration mode select 0 |
| Pino 125 | MSEL1 — Configuration mode select 1 |
| Pino 126 | MSEL2 — Configuration mode select 2 |
| Pino 127 | DCLK — Configuration clock input |
| Pino 128 | DATA0 — Configuration data input |
| Pino 129 | VCCA — PLL analog supply (1.2 V) |
| Pino 130 | GNDA — PLL analog ground |
| Pino 131 | VCCPD — Configuration supply (3.3 V) |
| Pino 132 | I/O — General purpose user I/O (bank 2) |
| Pino 133 | I/O — General purpose user I/O (bank 2) |
| Pino 134 | GND — Ground |
| Pino 135 | I/O — General purpose user I/O (bank 2) |
| Pino 136 | I/O — General purpose user I/O (bank 2) |
| Pino 137 | I/O — General purpose user I/O (bank 3) |
| Pino 138 | VCCIO3 — I/O bank 3 supply voltage |
| Pino 139 | I/O — General purpose user I/O (bank 3) |
| Pino 140 | I/O — General purpose user I/O (bank 3) |
| Pino 141 | I/O — General purpose user I/O (bank 3) |
| Pino 142 | VCCINT — Core supply voltage (1.0-1.2 V) |
| Pino 143 | GND — Ground |
| Pino 144 | I/O — General purpose user I/O (bank 3) |
Aplicações típicas
10CL025YE144C8G é adequado para 6 aplicaçãos: Industrial I/O Expansion and Protocol Bridging, Motor Control and Variable-Frequency Drives, Video Bridging and Display Processing, Low-Power IoT Edge Gateways, Portable Test and Measurement Instrumentation, Automotive Infotainment Auxiliary Controllers.
Industrial I/O Expansion and Protocol Bridging
The 10CL025YE144C8G is well-suited for industrial I/O expansion cards that need to bridge between legacy fieldbus protocols (RS-485, RS-232, Modbus RTU) and modern Ethernet/IP or PROFINET. Its 24,624 logic elements provide ample headroom for soft-core CPUs (such as the Nios II) plus custom protocol state machines, while the 76 user I/O pins accommodate multiple isolated serial channels and parallel GPIO. The C8 speed grade meets typical 12-100 MHz industrial baud requirements with timing margin. Designers should use the E144 exposed pad for thermal relief and follow Intel's industrial temperature layout guidelines.
Recomendado
Motor Control and Variable-Frequency Drives
In variable-frequency motor drives, the 10CL025YE144C8G handles field-oriented control (FOC) loops, PWM generation, and current-sampling coordination. The 66 dedicated 18x18 multipliers accelerate the Park/Clarke transforms and PI controllers used in vector control, while the 4 PLLs provide independent clocks for PWM, ADC, and encoder interfaces. With 1.2V core operation and the low-power 60 nm process, the device fits comfortably inside sealed inverter enclosures with no active cooling. The exposed pad on the E144 package is essential for dissipating the ~1-2 W typical power budget.
Recomendado
Video Bridging and Display Processing
The 10CL025YE144C8G can be used in video format converters, scalers, and LVDS-to-MIPI bridges for industrial displays and machine vision interfaces. Its M9K memory blocks (608 Kbit total) buffer line-scan or area-scan image data, and the multiplier array supports simple scaling and color-space conversion algorithms. The 76 I/O pins accommodate LVDS pairs and parallel RGB interfaces at moderate resolutions. Designers should use Quartus Prime's Video and Image Processing Suite IP for accelerated development and observe strict length-matched routing for LVDS channels.
Recomendado
Low-Power IoT Edge Gateways
For battery- or solar-powered edge gateways aggregating sensor data before forwarding to the cloud, the 10CL025YE144C8G offers a compelling combination of low static power (~70-100 mW idle) and sufficient logic to run a soft-core plus cryptographic accelerators. The C8 speed grade supports typical LoRaWAN, BLE, and sub-GHz radio host-controller duties. With 1.0-1.2V core operation, the device remains within the budget of a small solar-harvested supply. Designers should leverage Quartus' power-aware synthesis and clock-gating to extend battery life further.
Recomendado
Portable Test and Measurement Instrumentation
Portable oscilloscopes, data loggers, and bench-top test instruments benefit from the 10CL025YE144C8G's high multiplier count for DSP-based filtering and FFT operations, plus its M9K memory for sample buffering. The exposed-pad E144 package allows the device to fit inside handheld enclosures without active cooling. Designers can implement custom trigger logic, decimating filters, and on-screen display (OSD) generation entirely in fabric. Quartus' DSP Builder toolchain accelerates Simulink-based DSP development for these applications.
Recomendado
Automotive Infotainment Auxiliary Controllers
Although not AEC-Q100 qualified itself, the 10CL025YE144C8G is used in non-safety automotive applications such as head-unit auxiliary controllers, dashboard illumination drivers, and HMI expansion. Its 24K logic elements support multiple LIN/CAN soft controllers and LED-matrix drivers simultaneously. The 144-EQFP footprint is a common form factor for behind-dash modules. Designers targeting safety-critical automotive functions should select the AEC-Q100-qualified Cyclone 10 LP -Q variant or move to a different family.
Recomendado
Resumo dos produtos recomendados
Dados de referência de engenharia para 10CL025YE144C8G — comparação, orientação de projeto e informações de conformidade.
Guia de seleção
Comparação com alternativas
| Parâmetro | Este produto | 10CL025YE144C6G | 10CL025YE144A7G | 10CL025YE144I7G | 10CL016YE144C8G | 10CL010YE144C8G | 10CL006YE144C8G |
|---|---|---|---|---|---|---|---|
| Package | 144-EQFP (E144, 22x22 mm) | 144-EQFP (E144) - same | 144-EQFP (E144) - same | 144-EQFP (E144) - same | 144-EQFP (E144) - same | 144-EQFP (E144) - same | 144-EQFP (E144) - same |
| Brand | Intel | Intel | Intel | Intel | Intel | Intel | Intel |
| Logic Elements | 24,624 | 24,624 | 24,624 | 24,624 | 15,408 | 10,320 | 6,272 |
| Embedded Memory (bit) | 608,256 | 608,256 | 608,256 | 608,256 | 504,000 | 414,000 | 270,000 |
| 18x18 Multipliers | 66 | 66 | 66 | 66 | 56 | 46 | 30 |
| Speed Grade | C8 | C6 (slower) | A7 (faster) | I7 (industrial) | C8 | C8 | C8 |
| Operating Temperature | 0C to +85C (commercial) | 0C to +85C | 0C to +85C | -40C to +100C (industrial) | 0C to +85C | 0C to +85C | 0C to +85C |
Principais diferenciais
- Balanced logic density with low static power (vs Cyclone IV EP4CE25E144)
- C8 speed grade at lower cost than A7 variant (vs 10CL025YE144A7G)
- Commercial temp at minimum cost in the 25K-LE class (vs 10CL025YE144I7G)
- Expandable logic capacity on the same PCB (vs 10CL016YE144C8G)
Notas de projeto
The 10CL025YE144C8G requires multiple supply rails: VCCINT (1.0-1.2 V core), VCCIOx per bank (1.2-3.3 V), VCCA (1.2 V PLL analog), and VCCPD (3.3 V configuration). Intel recommends a specific power-up sequence (VCCINT before VCCPD before VCCIO) to prevent latch-up; use a supervisor IC such as the ADM1184 to enforce this. Place 100 nF decoupling capacitors within 5 mm of every VCCINT and VCCIO pin, with bulk 10-47 uF tantalum or polymer capacitors on each rail. The exposed pad (EP) must be soldered to a continuous ground plane to minimize thermal resistance.
Estimated: at 25% logic utilization, 50 MHz typical toggle rate, and 1.2 V VCCINT, the 10CL025YE144C8G dissipates approximately 1.0-1.5 W. With the E144 package theta_JA of approximately 28 C/W on a 4-layer JEDEC test board, the junction-to-ambient temperature rise is roughly 28-42 C. For commercial-grade (0C to +85C) operation, this leaves a margin of about 40-55 C above the maximum 85C ambient. In a sealed enclosure with limited airflow, derate by adding thermal vias under the exposed pad and enlarging the top-side copper pour to at least 1 square inch.
The 144-EQFP package has a 0.5 mm pitch and a 22x22 mm body. Route signals on inner layers to break out from the dense perimeter pins; allow at least 4 routing layers for a clean break-out. Differential pairs (LVDS) must be length-matched to within 150 mil; high-speed memory interfaces (DDR3) require strict impedance control of 50 ohm single-ended and 100 ohm differential. Quartus Prime's Pin Planner and the E144 board-level symbol library should be used to validate the schematic before tape-out.
Do not leave the nCONFIG pin floating during normal operation - it must be pulled high to VCCPD through a 10 kohm resistor, or the device will not enter user mode after configuration. Similarly, MSEL[2:0] must be tied to a valid configuration mode (e.g., 000 = AS standard, 001 = AS fast, 010 = PS, 100 = JTAG-only) and not left floating. The nSTATUS and CONF_DONE pins require external 10 kohm pull-ups to VCCPD. Refer to the Cyclone 10 LP Device Family Pin Connection Guidelines for the complete checklist.
Place the 50 MHz or 100 MHz configuration clock source (typically a dedicated oscillator) within 25 mm of the DCLK pin and shield the trace with ground vias. For Active Serial (AS) configuration using an EPCS or EPCQ flash, route the AS_DO, AS_CS, and DCLK traces as a matched-length group with no stubs. Keep JTAG signals (TCK, TMS, TDI, TDO) away from switching power and high-frequency I/O to prevent programming failures.
Informações de conformidade
RoHS and REACH compliant per Cyclone 10 LP product family datasheet. Not AEC-Q100 qualified - select AEC-Q100 variant for automotive safety-critical applications.
