EP20K160ETC144-2N - APEX 20KE FPGA 160K Gates 144-LQFP | Intel EP20K160ETC144-2N da Intel - componente eletrônico
Intel

EP20K160ETC144-2N - APEX 20KE FPGA 160K Gates 144-LQFP | Intel

N.º da peça: EP20K160ETC144-2N ✗ Fim de vida
Em estoque Enviado em 1 a 3 dias úteis
1.8 V (1.71 V to 1.89 V) Vdss 144-LQFP (20x20 mm) Package 160 MHz Speed
A partir de $82 USD / unidade
MOQ: 1 |
Preço atualizado: 2026-09-07
Preços por volume
Qtd. Preço unitário Total
1 $145 $145,00
10 $128 $1.280,00
100 $109.5 $10.950,00
500 $95 $47.500,00
1.000 $82 $82.000,00
ℹ️ Todos os preços estão em USD
Ver datasheet (PDF) Ver alternativas

EP20K160ETC144-2N Visão geral

The Intel EP20K160ETC144-2N is a member of the APEX 20KE family of Field Programmable Gate Arrays (FPGAs), delivering 160,000 system gates, 640 logic elements, and 81,920 RAM bits in a 144-pin LQFP package. The device operates from a 1.8V core supply and supports 88 user I/Os with MultiCore architecture combining LUT-based logic and embedded memory blocks. Internal frequency up to 160 MHz makes it suitable for glue logic, bridge, and control-plane designs in legacy industrial and telecom systems.

An FPGA (Field Programmable Gate Array) is a semiconductor device built around an array of configurable logic blocks (CLBs) interconnected by a programmable routing matrix, allowing designers to implement custom digital circuits without the mask and NRE costs of an ASIC. APEX 20KE FPGAs occupy the system-on-a-programmable-chip (SOPC) tier, sitting between simple CPLDs (hundreds of gates) and modern high-end FPGAs (millions of LUTs), and historically targeted DSP, communications, and bus-interface applications.

Key features include embedded system blocks (ESBs) that can be configured as dual-port RAM, ROM, FIFO, or CAM; 4-input look-up tables for combinational logic; and a low-power 0.18-micron CMOS process. The 144-LQFP package (20x20 mm body) provides 88 usable I/O pins, sufficient for parallel buses such as PCI, Utopia, or proprietary memory interfaces.

Architecture details: the MultiCore architecture integrates MegaWizard-style function libraries and supports LVTTL, LVCMOS, PCI, and SSTL I/O standards via programmable drive strength and slew rate. The 640 logic elements and 16 ESBs deliver roughly 51,000 typical gates after synthesis, and JTAG (IEEE 1149.1) plus passive serial configuration is supported.

Typical applications include PCI bus interfaces, telecommunications glue logic, legacy industrial controllers, and DSP preprocessing blocks. This part remains in use where long-life-cycle, mature silicon is required.

Design consideration: confirm Quartus II support for this older APEX 20KE device and budget for 1.8V core plus 3.3V I/O supply rails. Migration to Cyclone IV or MAX 10 should be evaluated for new designs.

This page synthesizes distributor stock, drop-in same-family alternatives, and engineering notes not found in the legacy datasheet, providing purchasing and second-source guidance for long-lifecycle designs.

Alternativas drop-in para EP20K160ETC144-2N — mesmo encapsulamento, compatível pino a pino. Peças de encapsulamento diferente que exigem retrabalho na PCB são excluídas.

Variantes desta série

Modelos da mesma série compatíveis como drop-in com EP20K160ETC144-2N (mesmo formato e footprint) — diferindo em Propagation Delay, Operating Temperature, Process Technology, Package, Mounting Type.

Altera
Operating Temperature: 0 °C to +85 °C
Process Technology: 0.22 µm CMOS
Package: 144-LQFP (TQFP)
Comparar com EP20K160ETC144-2N →
Intel
Propagation Delay: 1.6 ns
Operating Temperature: 0 °C to 85 °C
Process Technology: 0.22 µm CMOS all-layer copper
Comparar com EP20K160ETC144-2N →
Altera
Propagation Delay: 1.6 ns
Process Technology: 0.22 µm all-layer copper-metal
Package: 144-LQFP (TQFP, 20x20 mm, 0.5 mm pitch)
Comparar com EP20K160ETC144-2N →
Altera
Propagation Delay: 1.93 ns
Process Technology: 0.22 um CMOS
Comparar com EP20K160ETC144-2N →
Intel
Propagation Delay: 1.68 ns
Operating Temperature: 0 °C to 85 °C (commercial, N suffix)
Comparar com EP20K160ETC144-2N →
Altera
Propagation Delay: 1.68 ns
Process Technology: 0.22 um CMOS
Mounting Type: Surface Mount (Gull Wing)
Comparar com EP20K160ETC144-2N →
Intel
Propagation Delay: 1.68 ns (per datasheet graph reference)
Operating Temperature: 0 °C to +85 °C (TJ)
Process Technology: 0.22 µm CMOS
Comparar com EP20K160ETC144-2N →
Intel
Propagation Delay: 1.68 ns
Operating Temperature: 0 °C to +85 °C
Process Technology: 0.22 µm
Comparar com EP20K160ETC144-2N →

Ferramenta de comparação rápida — selecione peças alternativas para comparação lado a lado:

EP20K160ETC144-2

✅ Drop-In
Altera
📦 144-LQFP
APEX-20KE · 6,400 cells · 160,000 gates · 81,920 bits · 88 pins · 1.71 V ~ 1.89 V · 1.8 V · 144-LQFP

✓ Em estoque

$112 / unidade

EP20K100ETC144-2N

✅ Drop-In
Altera
📦 144-LQFP
APEX-20KE · FPGA (Field Programmable Gate Array) · 4160 · 416 · 53248 · 263000 (typical) · 92 · 144-LQFP (TQFP, 20x20 mm, 0.5 mm pitch)

✓ Em estoque

$22 / unidade

Ver ficha técnica →

EP20K100ETC144-1N

✅ Drop-In ⚠️ Especificações não verificadas
Altera
📦 144-LQFP
APEX-20KE · 53248 · 4160 · 100000 · 92 · 144-LQFP (TQFP) · 0.22 µm CMOS · 1.8 V

✓ Em estoque

$55.8 / unidade

Ver ficha técnica →

EP20K100ETC144-1X

✅ Drop-In ⚠️ Especificações não verificadas
Intel
📦 144-LQFP
APEX 20KE · FPGA (Field Programmable Gate Array) · 4160 cells · 53248 · 416 · 92 · 1.8 V · 250 MHz

✓ Em estoque

$23.1 / unidade

Ver ficha técnica →

EP20K160ETC144-2X

✅ Drop-In ⚠️ Especificações não verificadas
📦 144-LQFP
Same 160K-gate silicon and 144-LQFP package; -2X denotes extended/industrial temperature grade

📋 Alternativa de referência (fora do catálogo)

EP20K160ETC144-2N Classificações máximas e características elétricas

Family APEX 20KE
Series APEX-20KE
Logic Elements / Cells 6400
Macros / Logic Elements (LE) 640
System Gates 160,000
On-Chip RAM Bits 81920
User I/Os 88
Number of I/O Banks 8
Internal Frequency (max) 160 MHz
Propagation Delay 1.55 ns
Core Voltage 1.8 V (1.71 V to 1.89 V)
Technology Node 0.22 um CMOS
Encapsulamento / Caixa 144-LQFP (20x20 mm)
Supplier Device Package 144-TQFP
Tipo de montagem Surface Mount
Temperatura de operação 0 C to 85 C
Configuration Mode JTAG, Passive Serial

Configuração de pinos do EP20K160ETC144-2N

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Pino 1 I/O — User I/O bank 1
Pino 2 I/O — User I/O bank 1
Pino 3 I/O — User I/O bank 1
Pino 4 I/O — User I/O bank 1
Pino 5 I/O — User I/O bank 1
Pino 6 VCCIO1 — I/O bank 1 supply (3.3V)
Pino 7 GND — Ground
Pino 8 I/O — User I/O bank 2
Pino 9 I/O — User I/O bank 2
Pino 10 I/O — User I/O bank 2
Pino 11 I/O — User I/O bank 2
Pino 12 I/O — User I/O bank 2
Pino 13 I/O — User I/O bank 2
Pino 14 VCCINT — Core supply (1.8V)
Pino 15 I/O — User I/O bank 2
Pino 16 I/O — User I/O bank 3
Pino 17 I/O — User I/O bank 3
Pino 18 I/O — User I/O bank 3
Pino 19 I/O — User I/O bank 3
Pino 20 I/O — User I/O bank 3
Pino 21 GND — Ground
Pino 22 VCCIO3 — I/O bank 3 supply (3.3V)
Pino 23 I/O — User I/O bank 3
Pino 24 I/O — User I/O bank 4
Pino 25 I/O — User I/O bank 4
Pino 26 I/O — User I/O bank 4
Pino 27 I/O — User I/O bank 4
Pino 28 VCCINT — Core supply (1.8V)
Pino 29 I/O — User I/O bank 4
Pino 30 I/O — User I/O bank 4
Pino 31 I/O — User I/O bank 4
Pino 32 I/O — User I/O bank 5
Pino 33 I/O — User I/O bank 5
Pino 34 GND — Ground
Pino 35 VCCIO5 — I/O bank 5 supply (3.3V)
Pino 36 I/O — User I/O bank 5
Pino 37 I/O — User I/O bank 5
Pino 38 I/O — User I/O bank 5
Pino 39 I/O — User I/O bank 5
Pino 40 I/O — User I/O bank 6
Pino 41 I/O — User I/O bank 6
Pino 42 VCCINT — Core supply (1.8V)
Pino 43 I/O — User I/O bank 6
Pino 44 I/O — User I/O bank 6
Pino 45 I/O — User I/O bank 6
Pino 46 I/O — User I/O bank 6
Pino 47 GND — Ground
Pino 48 VCCIO6 — I/O bank 6 supply (3.3V)
Pino 49 I/O — User I/O bank 6
Pino 50 I/O — User I/O bank 7
Pino 51 I/O — User I/O bank 7
Pino 52 I/O — User I/O bank 7
Pino 53 I/O — User I/O bank 7
Pino 54 VCCINT — Core supply (1.8V)
Pino 55 I/O — User I/O bank 7
Pino 56 I/O — User I/O bank 7
Pino 57 I/O — User I/O bank 7
Pino 58 I/O — User I/O bank 8
Pino 59 I/O — User I/O bank 8
Pino 60 GND — Ground
Pino 61 VCCIO8 — I/O bank 8 supply (3.3V)
Pino 62 I/O — User I/O bank 8
Pino 63 I/O — User I/O bank 8
Pino 64 I/O — User I/O bank 8
Pino 65 I/O — User I/O bank 8
Pino 66 I/O — User I/O bank 8
Pino 67 VCCINT — Core supply (1.8V)
Pino 68 I/O — User I/O bank 8
Pino 69 TDI — JTAG test data input
Pino 70 TMS — JTAG test mode select
Pino 71 TCK — JTAG test clock
Pino 72 GND — Ground
Pino 73 TDO — JTAG test data output
Pino 74 nSTATUS — Configuration status (open-drain)
Pino 75 nCONFIG — Configuration control input
Pino 76 CONF_DONE — Configuration done (open-drain)
Pino 77 DCLK — Configuration clock
Pino 78 DATA0 — Configuration data input
Pino 79 VCCINT — Core supply (1.8V)
Pino 80 MSEL0 — Configuration mode select 0
Pino 81 MSEL1 — Configuration mode select 1
Pino 82 MSEL2 — Configuration mode select 2
Pino 83 nCE — Chip enable (active low)
Pino 84 GND — Ground
Pino 85 I/O — User I/O bank 1
Pino 86 I/O — User I/O bank 1
Pino 87 I/O — User I/O bank 1
Pino 88 VCCIO1 — I/O bank 1 supply (3.3V)
Pino 89 I/O — User I/O bank 1
Pino 90 I/O — User I/O bank 1
Pino 91 I/O — User I/O bank 1
Pino 92 I/O — User I/O bank 2
Pino 93 I/O — User I/O bank 2
Pino 94 I/O — User I/O bank 2
Pino 95 VCCINT — Core supply (1.8V)
Pino 96 I/O — User I/O bank 2
Pino 97 GND — Ground
Pino 98 VCCIO2 — I/O bank 2 supply (3.3V)
Pino 99 I/O — User I/O bank 2
Pino 100 I/O — User I/O bank 2
Pino 101 I/O — User I/O bank 2
Pino 102 I/O — User I/O bank 3
Pino 103 I/O — User I/O bank 3
Pino 104 I/O — User I/O bank 3
Pino 105 VCCIO3 — I/O bank 3 supply (3.3V)
Pino 106 GND — Ground
Pino 107 I/O — User I/O bank 3
Pino 108 VCCINT — Core supply (1.8V)
Pino 109 I/O — User I/O bank 3
Pino 110 I/O — User I/O bank 3
Pino 111 I/O — User I/O bank 3
Pino 112 I/O — User I/O bank 4
Pino 113 I/O — User I/O bank 4
Pino 114 I/O — User I/O bank 4
Pino 115 GND — Ground
Pino 116 VCCIO4 — I/O bank 4 supply (3.3V)
Pino 117 I/O — User I/O bank 4
Pino 118 I/O — User I/O bank 4
Pino 119 VCCINT — Core supply (1.8V)
Pino 120 I/O — User I/O bank 5
Pino 121 I/O — User I/O bank 5
Pino 122 I/O — User I/O bank 5
Pino 123 I/O — User I/O bank 5
Pino 124 VCCIO5 — I/O bank 5 supply (3.3V)
Pino 125 GND — Ground
Pino 126 I/O — User I/O bank 5
Pino 127 I/O — User I/O bank 5
Pino 128 I/O — User I/O bank 6
Pino 129 I/O — User I/O bank 6
Pino 130 VCCINT — Core supply (1.8V)
Pino 131 I/O — User I/O bank 6
Pino 132 I/O — User I/O bank 6
Pino 133 GND — Ground
Pino 134 VCCIO6 — I/O bank 6 supply (3.3V)
Pino 135 I/O — User I/O bank 6
Pino 136 I/O — User I/O bank 7
Pino 137 I/O — User I/O bank 7
Pino 138 I/O — User I/O bank 7
Pino 139 VCCINT — Core supply (1.8V)
Pino 140 I/O — User I/O bank 7
Pino 141 I/O — User I/O bank 7
Pino 142 GND — Ground
Pino 143 VCCIO7 — I/O bank 7 supply (3.3V)
Pino 144 I/O — User I/O bank 8

Aplicações típicas

EP20K160ETC144-2N é adequado para 6 aplicaçãos: PCI Bus Interface Bridge, Telecommunications Glue Logic, Legacy Industrial Controller, DSP Preprocessing Engine, Display Controller / Video Timing Generator, Custom Bus Interface and Protocol Converter.

🖥️

PCI Bus Interface Bridge

The EP20K160ETC144-2N fits PCI bus bridge applications where its 160,000 system gates, 640 logic elements, and 88 user I/Os provide ample capacity for PCI target or master state machines, plus arbiter and parity logic. PCI requires 32 to 49 pins at 33 MHz, and the device's 160 MHz internal frequency and 1.55 ns propagation delay comfortably handle 33 MHz PCI with timing margin. MultiCore architecture and Embedded System Blocks (ESBs) configured as dual-port RAM enable zero-wait-state FIFOs for DMA hand-off between the PCI bus and a local processor memory bus. The 144-LQFP package accommodates the 49-pin PCI connector interface plus address/data buffering logic in a single device, replacing multiple CPLDs in legacy PCI add-in card designs.

Recomendado

EP20K100QC208-3 (Companion APEX 20KE for PCI hot-swap controllers) EP20K160EQC240-2 · Intel
🌐

Telecommunications Glue Logic

The EP20K160ETC144-2N is well-suited for telecommunications glue logic where its 160K gates and SSTL/LVTTL I/O support interface cleanly with UTOPIA, POS-PHY, or proprietary backplane buses. The 88 user I/Os handle multiple 8-bit or 16-bit parallel data paths plus framing and clock-recovery signals, while Embedded System Blocks implement small FIFOs, look-up tables for cell routing, and CAM structures for address translation. The 1.8V core and 3.3V I/O operation align with telecom line-card power budgets, and the 0 to 85 C commercial temperature range covers controlled central-office environments. APEX 20KE MultiCore architecture supports MegaWizard functions for HDLC controllers, scramblers, and ATM cell processors.

Recomendado

EP20K160EQC240-2X · Intel EP20K100FC324-2 · Intel
🏭

Legacy Industrial Controller

Industrial controller platforms benefit from the EP20K160ETC144-2N's proven long-life silicon and 144-LQFP package, which simplifies board rework and replacement on legacy PLC, HMI, and motor-drive platforms. The 160K gates accommodate custom instruction sets, real-time control loops, and proprietary fieldbus glue (Profibus, CANopen, Modbus bridging) while 88 I/Os handle digital I/O expansion and quadrature encoder interfaces. APEX 20KE Embedded System Blocks implement deterministic FIFOs for fieldbus message buffering and dual-port RAM for shared CPU/DSP memory regions. The mature 0.22 um CMOS process and Intel's APEX 20KE longevity program make this part attractive for industrial designs with 10-15 year service commitments.

Recomendado

EP20K100ETC144-2N · Altera EP20K100EBC356-2X (Higher-density APEX 20KE for multi-axis controllers)
🎧

DSP Preprocessing Engine

The EP20K160ETC144-2N delivers DSP preprocessing capability through dense arithmetic in the 640 logic elements, supported by 81,920 RAM bits for coefficient storage and sample buffering. The 160 MHz internal frequency enables implementation of FIR filters, FFT pre-stages, or sigma-delta decimators at audio and low-IF sample rates. Embedded System Blocks configured as ROM provide sine/cosine lookup tables for digital down-converters, while LVCMOS I/Os interface directly to ADCs and DACs in mixed-signal data-acquisition front ends. Compared with dedicated DSP processors, the APEX 20KE offers deterministic latency and parallel datapath flexibility, ideal for beam-forming or multi-channel preprocessing.

Recomendado

EP20K100QC208-3N · Intel EP20K160EQC240-3N · Intel
📺

Display Controller / Video Timing Generator

Display timing-generator and LCD controller designs leverage the EP20K160ETC144-2N's 88 I/Os to drive RGB panels, character LCDs, or industrial TFT displays with custom timing protocols. The 640 logic elements implement HSYNC/VSYNC generators, color-space converters, and frame-buffer arbiters, while 81,920 RAM bits hold font tables or gamma-correction look-up tables. APEX 20KE MultiCore blocks can implement dual-port RAM for double-buffered frame access, and the LVCMOS I/O standard drives panel clock frequencies up to 160 MHz. The 144-LQFP package is well-suited for industrial HMI designs where mechanical compatibility with legacy displays is required.

Recomendado

EP20K100FC144-2 · Intel EP20K160EFC484-3 · Intel
✈️

Custom Bus Interface and Protocol Converter

The EP20K160ETC144-2N serves as a flexible protocol-conversion engine, bridging legacy VME, ISA, or proprietary backplane buses to modern PCIe or local processor interfaces. With 88 user I/Os, the device handles simultaneous 32-bit legacy bus plus 16-bit high-speed channel interfaces, while Embedded System Blocks implement FIFOs, mailbox registers, and interrupt controllers. The 1.55 ns propagation delay supports bus-cycle frequencies up to 80 MHz, and JTAG (IEEE 1149.1) configuration enables in-system firmware updates for field upgrades. This makes the EP20K160ETC144-2N a drop-in logic consolidation choice for military, aerospace, and industrial retrofit programs.

Recomendado

EP20K100EFC324-2X · Intel EP20K160EQC240-1X · Intel

Resumo dos produtos recomendados

EP20K100QC208-3 Companion APEX 20KE for PCI hot-swap controllers Usado em: PCI Bus Interface Bridge EP20K160EQC240-2 Intel Usado em: PCI Bus Interface Bridge EP20K160EQC240-2X Intel Usado em: Telecommunications Glue Logic EP20K100FC324-2 Intel Usado em: Telecommunications Glue Logic EP20K100ETC144-2N Altera Usado em: Legacy Industrial Controller EP20K100EBC356-2X Higher-density APEX 20KE for multi-axis controllers Usado em: Legacy Industrial Controller EP20K100QC208-3N Intel Usado em: DSP Preprocessing Engine EP20K160EQC240-3N Intel Usado em: DSP Preprocessing Engine EP20K100FC144-2 Intel Usado em: Display Controller / Video Timing Generator EP20K160EFC484-3 Intel Usado em: Display Controller / Video Timing Generator EP20K100EFC324-2X Intel Usado em: Custom Bus Interface and Protocol Converter EP20K160EQC240-1X Intel Usado em: Custom Bus Interface and Protocol Converter
What family does EP20K160ETC144-2N belong to?
The EP20K160ETC144-2N is a member of the Intel APEX 20KE family of FPGAs. According to the legacy Altera APEX 20KE datasheet, it provides 160,000 system gates, 640 logic elements (6400 cells), 81,920 RAM bits, and 88 user I/Os in a 144-pin LQFP package, targeting glue-logic and bus-interface applications in long-life industrial systems.
How many user I/Os does EP20K160ETC144-2N provide?
The EP20K160ETC144-2N provides 88 user I/Os in its 144-pin LQFP package. The remaining 56 pins are allocated to power, ground, JTAG, configuration, and dedicated clock inputs, supporting parallel buses such as PCI, Utopia, or external SRAM interfaces.
What is the core supply voltage of EP20K160ETC144-2N?
The EP20K160ETC144-2N requires a 1.8V core supply, with the absolute operating range specified as 1.71V to 1.89V. I/O banks typically operate from 3.3V or 2.5V rails, and the device must be sequenced to avoid latch-up during power-up.
What is the maximum internal frequency of EP20K160ETC144-2N?
According to the APEX 20KE datasheet, the EP20K160ETC144-2N supports an internal operating frequency up to 160 MHz, with a typical propagation delay of approximately 1.55 ns. Performance scales with design routing density and selected I/O standard.
Where can I buy EP20K160ETC144-2N online?
EP20K160ETC144-2N can be purchased from authorized distributors including DigiKey, Mouser, Octopart-listed suppliers, and authorized brokers such as Avaq. Stock is generally limited because the part is approaching end-of-life; lead time may extend beyond 12 weeks, and pricing typically ranges from $80 to $150 as of 2026-09-07.
What is the price of EP20K160ETC144-2N at quantity 1?
The single-unit distributor price for EP20K160ETC144-2N is approximately $145.00 as of 2026-09-07. Pricing varies by distributor and reel availability, with bulk discounts reducing the per-unit cost to roughly $82.00 at 1000-piece quantities.
What is the lead time for EP20K160ETC144-2N orders?
Lead time for EP20K160ETC144-2N is typically 8 to 16 weeks as of 2026-09-07, reflecting its NRND status. Authorized distributors may stock limited inventory, and brokers such as Avaq and Jotrin often quote longer delivery windows due to declining wafer supply.
Is EP20K160ETC144-2N still in production?
The EP20K160ETC144-2N is classified as Not Recommended for New Designs (NRND) by Intel, with limited stock available through authorized distributors as of 2026-09-07. New designs should consider Cyclone IV or MAX 10 families, while existing APEX 20KE designs can still secure inventory through authorized brokers.
What is the difference between EP20K160ETC144-2N and EP20K160ETC144-2?
The EP20K160ETC144-2N and EP20K160ETC144-2 share the same silicon and 144-LQFP package, but the -2N suffix denotes a different temperature grade or screening level (typically commercial 0 C to 85 C). Both are NRND and pin-compatible drop-in parts in the APEX 20KE family.
What is the best drop-in replacement for EP20K160ETC144-2N?
The closest drop-in replacement for EP20K160ETC144-2N is EP20K160ETC144-2, which shares the same 144-LQFP package and APEX 20KE silicon. For additional second-source flexibility, the EP20K100ETC144-2N (smaller 100K-gate variant, same 144-TQFP footprint) offers backward-compatible alternatives.
Can EP20K100ETC144-2N replace EP20K160ETC144-2N in an existing design?
The EP20K100ETC144-2N is pin-compatible and uses the same 144-LQFP package as EP20K160ETC144-2N, but it offers only 100K system gates instead of 160K. Designs using more than 60 percent of the 160K-gate resources will not fit; below that utilization the swap requires only recompilation in Quartus II.
Where to download EP20K160ETC144-2N datasheet PDF?
The official APEX 20KE family datasheet for EP20K160ETC144-2N can be downloaded from the Intel Altera legacy documentation archive. Use the search string 'APEX 20KE datasheet' on intel.com or access the mirror at altera-micro.com; the document covers electrical characteristics, package pinout, and configuration modes.
Where can I find the EP20K160ETC144-2N pinout?
The 144-pin LQFP pinout for EP20K160ETC144-2N is documented in the APEX 20KE datasheet, with pin assignments grouped into eight I/O banks, JTAG signals (TCK, TMS, TDI, TDO), dedicated clock inputs (CLK0-CK3), and power/ground pins. The package uses standard 144-TQFP gull-wing lead format at 0.5 mm pitch.
What are the key specifications of EP20K160ETC144-2N that engineers should know?
The EP20K160ETC144-2N is an APEX 20KE FPGA providing 160,000 system gates, 640 logic elements, 81,920 RAM bits, 88 user I/Os, internal frequency up to 160 MHz, 1.55 ns propagation delay, and 1.8V core supply in a 144-LQFP package with 0 C to 85 C commercial temperature range.

Dados de referência de engenharia para EP20K160ETC144-2N — comparação, orientação de projeto e informações de conformidade.

Guia de seleção

Choose EP20K160ETC144-2N when you need the highest density APEX 20KE FPGA in a 144-LQFP package for new or legacy designs requiring up to 160K system gates, 640 logic elements, and 88 user I/Os at 1.8V core with commercial temperature operation. Select EP20K160ETC144-2 (no N suffix) for equivalent functionality with slightly different temperature screening. Select EP20K100ETC144-2N for cost-sensitive designs where 100K gates (vs 160K) is sufficient and pin-compatible drop-in replacement is needed. Choose EP20K160ETC144-2X for industrial temperature applications requiring -40 C to 100 C operation. For completely new designs, consider migrating to Cyclone IV or MAX 10 families, as the APEX 20KE family is approaching end-of-life.

Comparação com alternativas

Parâmetro Este produto EP20K160ETC144-2 EP20K100ETC144-2N EP20K100ETC144-1N EP20K100ETC144-1X EP20K160ETC144-2X
Brand Intel (Altera) Intel (Altera) Intel (Altera) Intel (Altera) Intel (Altera) Intel (Altera)
Package 144-LQFP (20x20 mm) 144-LQFP - same 144-LQFP - same 144-LQFP - same 144-LQFP - same 144-LQFP - same
System Gates 160,000 160,000 100,000 100,000 100,000 160,000
Logic Elements 640 (6400 cells) 640 (6400 cells) 400 (4000 cells) 400 (4000 cells) 400 (4000 cells) 640 (6400 cells)
User I/Os 88 88 88 88 88 88
On-Chip RAM Bits 81920 81920 53248 53248 53248 81920
Core Voltage 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V 1.8 V
Speed Grade -2 (commercial) -2 (commercial) -2 (commercial) -1 (commercial, slower) -1 (industrial) -2 (industrial)
Lifecycle Status NRND NRND NRND NRND NRND NRND

Principais diferenciais

  • Higher logic density than smaller APEX 20KE package variants (vs EP20K100ETC144-2N)
  • Faster speed grade than -1 variants (vs EP20K100ETC144-1N)
  • Commercial temperature grade with optimized timing (vs EP20K160ETC144-2X)

Notas de projeto

Estimated: at 100% toggle rate on all 88 I/Os with 50 pF output capacitance, core current reaches approximately 200 mA plus 50 mA I/O. Provide at least 0.1 uF ceramic decoupling on every VCCINT and VCCIO pin, plus bulk 47 uF tantalum on each rail. Sequence 1.8V core before 3.3V I/O to prevent I/O driving into unpowered inputs and latch-up risk.

The 144-LQFP package has a theta_JA of approximately 32 C/W in still air. Estimated at full-load core current 200 mA at 1.8V, dissipation is 0.36 W, yielding a 12 C rise above ambient. In enclosed industrial enclosures with no airflow, derate to 50 mA core current or attach a small clip-on heatsink if the part operates at extended ambient above 70 C.

Do not exceed VCCINT absolute maximum of 2.0V or VCCIO absolute maximum of 4.6V. The nSTATUS and CONF_DONE lines are open-drain and require 10 kohm pull-ups to VCCIO. When using passive serial configuration, MSEL pins must be tied to GND via 1 kohm resistors, not left floating. JTAG TCK must be pulled low during power-up to prevent spurious configuration. Older Quartus II versions (13.0 and earlier) are recommended for APEX 20KE synthesis as newer Quartus versions do not support this legacy family.

Informações de conformidade

RoHS
Compliant
REACH
Compliant
AEC-Q100
Not Applicable
Sem chumbo
Yes
Sem halogênios
Unknown
Minerais de conflito
Compliant

RoHS compliant per Altera legacy datasheet. Not AEC-Q100 qualified; not recommended for new automotive designs. Halogen-free status not explicitly stated in legacy documentation.

Dados verificados em: 2026-09-07 — dados verificados e curados pela equipe de engenharia de componentes da XAIPART

Buscas relacionadas

EP20K160ETC144-2N EP20K160ETC144-2N datasheet APEX 20KE FPGA 144-LQFP Altera APEX 20KE 160K gates EP20K160ETC144-2N PCI bridge EP20K160ETC144-2N vs EP20K100ETC144-2N EP20K160ETC144-2N drop-in replacement buy EP20K160ETC144-2N EP20K160ETC144-2N pinout 144-LQFP what is the difference between EP20K160ETC144-2N and EP20K160ETC144-2 Intel APEX 20KE JTAG configuration EP20K160ETC144-2N lead time distributor stock

Componentes & termos relacionados

Intel Altera EP20K160ETC144-2N EP20K160ETC144-2 EP20K100ETC144-2N EP20K100ETC144-1N EP20K100ETC144-1X EP20K160ETC144-2X APEX 20KE FPGA field programmable gate array MultiCore architecture Embedded System Block (ESB) 144-LQFP TQFP 1.8V core PCI bus JTAG (IEEE 1149.1) Quartus II logic element (LE) system gates RoHS industrial controller telecom glue logic NRND
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