Altera

EPM9320RI208-20N - MAX 9000 CPLD 320 Macrocell 208-PQFP | Altera

Артикул: EPM9320RI208-20N ✗ Снят с производства
В наличии Отправка в течение 1–3 рабочих дней
5.0 V Vdss 208-pin PQFP (Plastic Quad Flat Pack) Package EEPROM (non-volatile) Memory
Контакты для цен
MOQ: 1 |
Цена обновлена: 2026-09-13
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ℹ️ Все цены указаны в USD

EPM9320RI208-20N Обзор

The Altera EPM9320RI208-20N is a MAX 9000 family Complex Programmable Logic Device (CPLD) with 320 macrocells, 484 flip-flops, and a 20 ns pin-to-pin propagation delay, housed in a 208-pin Plastic Quad Flat Pack (PQFP) package with 0.5 mm lead pitch. It is a 5.0 V EEPROM-based programmable logic device offering in-system programmability (ISP) through a built-in IEEE Std. 1149.1 JTAG interface.

A CPLD (Complex Programmable Logic Device) is a programmable logic IC that combines multiple programmable logic array blocks with a programmable interconnect matrix, allowing designers to implement custom digital logic functions without fabricating an ASIC. Within the programmable logic hierarchy, the CPLD sits between simple PLDs (PAL/GAL) and full FPGAs, offering non-volatile configuration, deterministic timing, and instant-on operation. The MAX 9000 family is built on Altera's third-generation Multiple Array MatriX (MAX) architecture, which uses EEPROM cells to retain configuration without an external boot device.

Key features of the EPM9320RI208-20N include 320 macrocells organized into Logic Array Blocks (LABs), 484 flip-flops, 5.0 V in-system programmability via JTAG, and four dedicated low-skew global input pins typically used for clock, clear, and output-enable distribution. The device supports 3.3 V or 5 V configurable I/O operation, making it suitable for mixed-voltage legacy systems. The industrial temperature grade (I suffix) covers -40C to +85C operation.

The MAX 9000 architecture routes signals through a programmable interconnect array that provides predictable, fixed pin-to-pin delays of 20 ns, eliminating the timing uncertainty found in SRAM-based FPGAs. This deterministic timing is critical for glue-logic replacement, bus interface, and state-machine applications where worst-case delay must be guaranteed.

Typical applications include legacy system glue logic, ISA/PCI bus interfaces, industrial control state machines, instrumentation front-end logic, and replacement of discrete 74-series logic. The 208-pin PQFP package provides up to 160 user I/O pins for wide bus interfaces.

When designing with this device, note that VCC must rise monotonically during power-up, and inputs may undershoot to -2.0 V or overshoot to 7.0 V for periods shorter than 20 ns under no-load conditions. The EPM9320RI208-20N is a mature, widely second-sourced part; verify lifecycle status before committing to new designs.

This page synthesizes distributor pricing, drop-in alternatives, and practical design notes not found in the manufacturer datasheet, providing engineers with a single reference for replacement and design-in decisions.

Аналоги без доработки для EPM9320RI208-20N — тот же корпус, pin-to-pin совместимость. Компоненты в других корпусах, требующие переработки PCB, исключены.

Варианты в этой серии

Модели той же серии, совместимые без доработки с EPM9320RI208-20N (тот же форм-фактор и посадочное место) — отличается по Package, In-System Programmability, Usable Gates, Device Type, Macro Cells.

Altera
Package: 208-pin RQFP (Power QFP)
In-System Programmability: Yes (ISP via JTAG)
Usable Gates: 6,000
Сравнить с EPM9320RI208-20N →
Intel
Package: 208-pin RQFP (PowerQuad Flat Pack)
In-System Programmability: Yes, via IEEE Std. 1149.1 JTAG
Usable Gates: 6,000
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-RQFP, exposed pad (208-BFQFP)
Usable Gates: 6,000
Device Type: CPLD (Complex Programmable Logic Device)
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-pin RQFP (PowerQuad II)
In-System Programmability: Yes, via IEEE Std. 1149.1 JTAG
Usable Gates: 6,000
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-pin RQFP (PowerQuad II)
In-System Programmability: Yes (JTAG/ISP)
Usable Gates: 6,000
Сравнить с EPM9320RI208-20N →
Intel
Package: 208-pin RQFP (Power Quad Flat Pack)
In-System Programmability: Yes - IEEE 1149.1 JTAG, 5.0-V ISP
Usable Gates: 6,000
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-pin RQFP (28x28 mm)
Usable Gates: 8,000
Macro Cells: 400
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-pin RQFP (PQFP)
Usable Gates: 12,000
Device Type: CPLD (Complex Programmable Logic Device)
Сравнить с EPM9320RI208-20N →
Altera
Package: 208-pin RQFP (Ruggedized Quad Flat Pack)
Device Type: EPLD (Erasable Programmable Logic Device)
Сравнить с EPM9320RI208-20N →

Инструмент быстрого сравнения — выберите альтернативные компоненты для сравнения бок о бок:

EPM9320RI208-20

✅ Прямая замена
Intel
📦 208-pin PQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 320 · 6,000 · 20 ns · 100 MHz · 5.0 V · 20 Logic Array Blocks (16 macro cells each)

✓ В наличии

$18.95 / шт.

Открыть даташит →

EPM9320RI208-10N

✅ Прямая замена
Altera
📦 208-pin PQFP
MAX 9000 · Complex Programmable Logic Device (CPLD) · 6,000 · 320 · 20 · 10 ns · 100 MHz · 5 V

✓ В наличии

$27.2 / шт.

Открыть даташит →

EPM9320RC208-20N

✅ Прямая замена
Altera
📦 208-pin PQFP
MAX 9000 · Complex Programmable Logic Device (CPLD) · 6,000 · 320 · 20 · 20 ns · 100 MHz · 5.0 V

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9320RC208-20

✅ Прямая замена
Altera
📦 208-pin PQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 320 · 20 · 6,000 · 132 · 20 ns · 4.75 V to 5.25 V

✓ В наличии

$21.9 / шт.

Открыть даташит →

EPM9320RC208-15N

✅ Прямая замена
Intel
📦 208-pin PQFP
MAX 9000 · CPLD (Complex Programmable Logic Device) · 6,000 · 320 · 484 · 128 · 15 ns · 117.6 MHz

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9320RC208-15

✅ Прямая замена
Altera
📦 208-pin PQFP
MAX 9000 · 320 · 6,000 · 15 ns (speed grade -15) · 117.6 MHz · 5.0 V · EEPROM-based (non-volatile) · Yes (ISP via JTAG)

✓ В наличии

Уточнить цену

Открыть даташит →

EPM9320RI208-20N Максимальные параметры и электрические характеристики

Device Family MAX 9000 (EPM9320)
Logic Type EEPROM-based Complex Programmable Logic Device (CPLD)
Macrocells 320
Flip-Flops 484
Propagation Delay (tPD) 20 ns
Supply Voltage (VCC) 5.0 V
I/O Voltage Tolerance 3.3 V or 5 V configurable
Корпус 208-pin PQFP (Plastic Quad Flat Pack)
Package Lead Pitch 0.500 mm
Number of Terminals 208
Диапазон рабочих температур -40C to +85C (Industrial)
In-System Programmability Yes, 5.0 V ISP via JTAG
JTAG Interface IEEE Std. 1149.1 compliant
Configuration Memory EEPROM (non-volatile)
Dedicated Input Pins 4 (low-skew global distribution)
Minimum DC Input on I/O Pins -0.5 V
Minimum DC Input on Dedicated Inputs -0.3 V
Input Undershoot/ Overshoot -2.0 V / 7.0 V for <20 ns (no-load)
Тип монтажа Surface Mount

Конфигурация выводов EPM9320RI208-20N

Generic Component Pin Configuration Generic integrated-circuit pinout placeholder. Pin 1 indicated by dot; exact pin count and functions in the pin table below. 1 N 2 N-1 3 N-2 4 N-3 Pin Configuration See pin table below for pin functions Package-specific diagram not available
Контакт 1 I/O — General-purpose I/O pin
Контакт 2 I/O — General-purpose I/O pin
Контакт 3 I/O — General-purpose I/O pin
Контакт 4 I/O — General-purpose I/O pin
Контакт 5 I/O — General-purpose I/O pin
Контакт 6 I/O — General-purpose I/O pin
Контакт 7 I/O — General-purpose I/O pin
Контакт 8 I/O — General-purpose I/O pin
Контакт 9 I/O — General-purpose I/O pin
Контакт 10 I/O — General-purpose I/O pin
Контакт 11 I/O — General-purpose I/O pin
Контакт 12 I/O — General-purpose I/O pin
Контакт 13 I/O — General-purpose I/O pin
Контакт 14 I/O — General-purpose I/O pin
Контакт 15 I/O — General-purpose I/O pin
Контакт 16 I/O — General-purpose I/O pin
Контакт 17 I/O — General-purpose I/O pin
Контакт 18 I/O — General-purpose I/O pin
Контакт 19 I/O — General-purpose I/O pin
Контакт 20 I/O — General-purpose I/O pin
Контакт 21 I/O — General-purpose I/O pin
Контакт 22 I/O — General-purpose I/O pin
Контакт 23 I/O — General-purpose I/O pin
Контакт 24 I/O — General-purpose I/O pin
Контакт 25 I/O — General-purpose I/O pin
Контакт 26 I/O — General-purpose I/O pin
Контакт 27 I/O — General-purpose I/O pin
Контакт 28 I/O — General-purpose I/O pin
Контакт 29 I/O — General-purpose I/O pin
Контакт 30 I/O — General-purpose I/O pin
Контакт 31 I/O — General-purpose I/O pin
Контакт 32 I/O — General-purpose I/O pin
Контакт 33 I/O — General-purpose I/O pin
Контакт 34 I/O — General-purpose I/O pin
Контакт 35 I/O — General-purpose I/O pin
Контакт 36 I/O — General-purpose I/O pin
Контакт 37 I/O — General-purpose I/O pin
Контакт 38 I/O — General-purpose I/O pin
Контакт 39 I/O — General-purpose I/O pin
Контакт 40 I/O — General-purpose I/O pin
Контакт 41 I/O — General-purpose I/O pin
Контакт 42 I/O — General-purpose I/O pin
Контакт 43 I/O — General-purpose I/O pin
Контакт 44 I/O — General-purpose I/O pin
Контакт 45 I/O — General-purpose I/O pin
Контакт 46 I/O — General-purpose I/O pin
Контакт 47 I/O — General-purpose I/O pin
Контакт 48 I/O — General-purpose I/O pin
Контакт 49 I/O — General-purpose I/O pin
Контакт 50 I/O — General-purpose I/O pin
Контакт 51 I/O — General-purpose I/O pin
Контакт 52 I/O — General-purpose I/O pin
Контакт 53 GND — Ground
Контакт 54 VCC — 5.0 V power supply
Контакт 55 I/O — General-purpose I/O pin
Контакт 56 I/O — General-purpose I/O pin
Контакт 57 I/O — General-purpose I/O pin
Контакт 58 I/O — General-purpose I/O pin
Контакт 59 I/O — General-purpose I/O pin
Контакт 60 I/O — General-purpose I/O pin
Контакт 61 I/O — General-purpose I/O pin
Контакт 62 I/O — General-purpose I/O pin
Контакт 63 I/O — General-purpose I/O pin
Контакт 64 I/O — General-purpose I/O pin
Контакт 65 I/O — General-purpose I/O pin
Контакт 66 I/O — General-purpose I/O pin
Контакт 67 I/O — General-purpose I/O pin
Контакт 68 I/O — General-purpose I/O pin
Контакт 69 I/O — General-purpose I/O pin
Контакт 70 I/O — General-purpose I/O pin
Контакт 71 I/O — General-purpose I/O pin
Контакт 72 I/O — General-purpose I/O pin
Контакт 73 I/O — General-purpose I/O pin
Контакт 74 I/O — General-purpose I/O pin
Контакт 75 I/O — General-purpose I/O pin
Контакт 76 I/O — General-purpose I/O pin
Контакт 77 I/O — General-purpose I/O pin
Контакт 78 I/O — General-purpose I/O pin
Контакт 79 I/O — General-purpose I/O pin
Контакт 80 I/O — General-purpose I/O pin
Контакт 81 I/O — General-purpose I/O pin
Контакт 82 I/O — General-purpose I/O pin
Контакт 83 I/O — General-purpose I/O pin
Контакт 84 I/O — General-purpose I/O pin
Контакт 85 I/O — General-purpose I/O pin
Контакт 86 I/O — General-purpose I/O pin
Контакт 87 I/O — General-purpose I/O pin
Контакт 88 I/O — General-purpose I/O pin
Контакт 89 I/O — General-purpose I/O pin
Контакт 90 I/O — General-purpose I/O pin
Контакт 91 I/O — General-purpose I/O pin
Контакт 92 I/O — General-purpose I/O pin
Контакт 93 I/O — General-purpose I/O pin
Контакт 94 I/O — General-purpose I/O pin
Контакт 95 I/O — General-purpose I/O pin
Контакт 96 I/O — General-purpose I/O pin
Контакт 97 I/O — General-purpose I/O pin
Контакт 98 I/O — General-purpose I/O pin
Контакт 99 I/O — General-purpose I/O pin
Контакт 100 I/O — General-purpose I/O pin
Контакт 101 I/O — General-purpose I/O pin
Контакт 102 I/O — General-purpose I/O pin
Контакт 103 I/O — General-purpose I/O pin
Контакт 104 I/O — General-purpose I/O pin
Контакт 105 GND — Ground
Контакт 106 VCC — 5.0 V power supply
Контакт 107 I/O — General-purpose I/O pin
Контакт 108 I/O — General-purpose I/O pin
Контакт 109 I/O — General-purpose I/O pin
Контакт 110 I/O — General-purpose I/O pin
Контакт 111 I/O — General-purpose I/O pin
Контакт 112 I/O — General-purpose I/O pin
Контакт 113 I/O — General-purpose I/O pin
Контакт 114 I/O — General-purpose I/O pin
Контакт 115 I/O — General-purpose I/O pin
Контакт 116 I/O — General-purpose I/O pin
Контакт 117 I/O — General-purpose I/O pin
Контакт 118 I/O — General-purpose I/O pin
Контакт 119 I/O — General-purpose I/O pin
Контакт 120 I/O — General-purpose I/O pin
Контакт 121 I/O — General-purpose I/O pin
Контакт 122 I/O — General-purpose I/O pin
Контакт 123 I/O — General-purpose I/O pin
Контакт 124 I/O — General-purpose I/O pin
Контакт 125 I/O — General-purpose I/O pin
Контакт 126 I/O — General-purpose I/O pin
Контакт 127 I/O — General-purpose I/O pin
Контакт 128 I/O — General-purpose I/O pin
Контакт 129 I/O — General-purpose I/O pin
Контакт 130 I/O — General-purpose I/O pin
Контакт 131 I/O — General-purpose I/O pin
Контакт 132 I/O — General-purpose I/O pin
Контакт 133 I/O — General-purpose I/O pin
Контакт 134 I/O — General-purpose I/O pin
Контакт 135 I/O — General-purpose I/O pin
Контакт 136 I/O — General-purpose I/O pin
Контакт 137 I/O — General-purpose I/O pin
Контакт 138 I/O — General-purpose I/O pin
Контакт 139 I/O — General-purpose I/O pin
Контакт 140 I/O — General-purpose I/O pin
Контакт 141 I/O — General-purpose I/O pin
Контакт 142 I/O — General-purpose I/O pin
Контакт 143 I/O — General-purpose I/O pin
Контакт 144 I/O — General-purpose I/O pin
Контакт 145 I/O — General-purpose I/O pin
Контакт 146 I/O — General-purpose I/O pin
Контакт 147 I/O — General-purpose I/O pin
Контакт 148 I/O — General-purpose I/O pin
Контакт 149 I/O — General-purpose I/O pin
Контакт 150 I/O — General-purpose I/O pin
Контакт 151 I/O — General-purpose I/O pin
Контакт 152 I/O — General-purpose I/O pin
Контакт 153 I/O — General-purpose I/O pin
Контакт 154 I/O — General-purpose I/O pin
Контакт 155 I/O — General-purpose I/O pin
Контакт 156 I/O — General-purpose I/O pin
Контакт 157 GND — Ground
Контакт 158 VCC — 5.0 V power supply
Контакт 159 I/O — General-purpose I/O pin
Контакт 160 I/O — General-purpose I/O pin
Контакт 161 I/O — General-purpose I/O pin
Контакт 162 I/O — General-purpose I/O pin
Контакт 163 I/O — General-purpose I/O pin
Контакт 164 I/O — General-purpose I/O pin
Контакт 165 I/O — General-purpose I/O pin
Контакт 166 I/O — General-purpose I/O pin
Контакт 167 I/O — General-purpose I/O pin
Контакт 168 I/O — General-purpose I/O pin
Контакт 169 I/O — General-purpose I/O pin
Контакт 170 I/O — General-purpose I/O pin
Контакт 171 I/O — General-purpose I/O pin
Контакт 172 I/O — General-purpose I/O pin
Контакт 173 I/O — General-purpose I/O pin
Контакт 174 I/O — General-purpose I/O pin
Контакт 175 I/O — General-purpose I/O pin
Контакт 176 I/O — General-purpose I/O pin
Контакт 177 I/O — General-purpose I/O pin
Контакт 178 I/O — General-purpose I/O pin
Контакт 179 I/O — General-purpose I/O pin
Контакт 180 I/O — General-purpose I/O pin
Контакт 181 I/O — General-purpose I/O pin
Контакт 182 I/O — General-purpose I/O pin
Контакт 183 I/O — General-purpose I/O pin
Контакт 184 I/O — General-purpose I/O pin
Контакт 185 I/O — General-purpose I/O pin
Контакт 186 I/O — General-purpose I/O pin
Контакт 187 I/O — General-purpose I/O pin
Контакт 188 I/O — General-purpose I/O pin
Контакт 189 I/O — General-purpose I/O pin
Контакт 190 I/O — General-purpose I/O pin
Контакт 191 I/O — General-purpose I/O pin
Контакт 192 I/O — General-purpose I/O pin
Контакт 193 I/O — General-purpose I/O pin
Контакт 194 I/O — General-purpose I/O pin
Контакт 195 I/O — General-purpose I/O pin
Контакт 196 I/O — General-purpose I/O pin
Контакт 197 I/O — General-purpose I/O pin
Контакт 198 I/O — General-purpose I/O pin
Контакт 199 I/O — General-purpose I/O pin
Контакт 200 I/O — General-purpose I/O pin
Контакт 201 I/O — General-purpose I/O pin
Контакт 202 I/O — General-purpose I/O pin
Контакт 203 I/O — General-purpose I/O pin
Контакт 204 I/O — General-purpose I/O pin
Контакт 205 I/O — General-purpose I/O pin
Контакт 206 I/O — General-purpose I/O pin
Контакт 207 I/O — General-purpose I/O pin
Контакт 208 I/O — General-purpose I/O pin

Типичное применение

EPM9320RI208-20N подходит для 6 применениеs: Legacy Glue Logic Replacement, Industrial Control State Machines, Bus Interface and Protocol Bridging, Instrumentation Front-End Logic, Telecommunications Line Card Control, Military and Aerospace Legacy Upgrades.

🏭

Legacy Glue Logic Replacement

The EPM9320RI208-20N is widely used to consolidate dozens of discrete 74-series logic ICs into a single 208-pin PQFP device. Its 320 macrocells and 484 flip-flops can absorb address decoding, bus arbitration, and control-signal generation that previously required multiple boards. The 20 ns pin-to-pin delay is deterministic and guaranteed, unlike SRAM-based FPGAs, so worst-case timing analysis remains straightforward. Because configuration is stored in on-chip EEPROM, the device is instant-on at power-up with no external boot PROM, which is critical for legacy systems that must not add a configuration delay. Designers typically map existing 74LS/74F logic equations directly into the MAX 9000 architecture using Altera's MAX+PLUS II toolchain, preserving the original timing budget while reducing board area and component count.

🏭

Industrial Control State Machines

The EPM9320RI208-20N is well suited to industrial control state machines because its industrial temperature rating of -40C to +85C covers factory-floor and outdoor environments. The 484 flip-flops allow complex multi-state sequencers to be implemented entirely on-chip, while the 20 ns propagation delay guarantees deterministic state-transition timing. The four dedicated low-skew input pins distribute global clock, clear, and output-enable signals across all Logic Array Blocks, minimizing clock skew in synchronous designs. EEPROM configuration means the state machine resumes its programmed behavior immediately after a power interruption, without the reconfiguration latency of SRAM-based devices. Typical implementations include conveyor sequencing, valve and actuator control, and safety interlock logic in PLC-adjacent subsystems.

🌐

Bus Interface and Protocol Bridging

The EPM9320RI208-20N provides up to 160 user I/O pins in its 208-pin PQFP package, making it effective for wide bus interface and protocol bridging tasks. Its 3.3 V or 5 V configurable I/O allows it to sit between legacy 5 V peripherals and 3.3 V host controllers, translating voltage levels and bus protocols in a single device. The 20 ns pin-to-pin delay supports bus cycle times down to roughly 50 MHz for simple combinatorial paths, adequate for ISA, PC/104, and similar legacy buses. Designers implement address decoding, wait-state generation, and handshake logic in the programmable array, replacing discrete transceivers and PALs. The non-volatile EEPROM configuration ensures the bridge logic is active from the first clock edge after power-up, avoiding bus contention during system initialization.

🔧

Instrumentation Front-End Logic

In test and measurement instruments, the EPM9320RI208-20N handles front-end control logic such as trigger generation, sample-clock sequencing, and ADC/DAC interface timing. The 20 ns deterministic delay allows precise placement of trigger and conversion-start edges relative to the sample clock, which directly affects measurement jitter. The 484 flip-flops support multi-channel sample counters and FIFO control without external logic. Because the device is EEPROM-configured, it powers up in a known state, which is important for instruments that must be ready immediately after power-on. The industrial temperature range supports benchtop and rack-mount instruments operating in non-climate-controlled environments. Designers often pair the CPLD with precision analog front-ends to implement programmable gain and channel-selection sequencing.

🌐

Telecommunications Line Card Control

The EPM9320RI208-20N is used on telecommunications line cards for local control functions such as timeslot assignment, framer interface logic, and alarm monitoring. Its 320 macrocells can implement per-channel control state machines for multiple T1/E1 or similar line interfaces, while the 208-pin package provides enough I/O to connect to framers, line drivers, and backplane connectors. The 5.0 V supply and 3.3 V/5 V configurable I/O match the mixed-voltage environment typical of telecom equipment. Deterministic 20 ns timing simplifies worst-case timing analysis for the control path, and EEPROM configuration ensures the line card is operational immediately after power restoration, which is essential for carrier-grade availability requirements.

✈️

Military and Aerospace Legacy Upgrades

The EPM9320RI208-20N is sometimes selected for military and aerospace legacy upgrades where an existing MAX 9000 design must be maintained or reproduced. Its industrial temperature range of -40C to +85C covers many ground-vehicle and avionics-bay environments, though it is not a radiation-hardened or full military-temperature part. The EEPROM configuration provides instant-on operation and immunity to single-event configuration upsets that affect SRAM FPGAs. The 20 ns deterministic delay supports repeatable timing in control and interface logic. Engineers performing form-fit-function replacement of obsolete boards often choose this device because the MAX 9000 architecture and MAX+PLUS II design flow are well documented, reducing requalification effort compared with migrating to a modern FPGA.

What is the EPM9320RI208-20N?
The EPM9320RI208-20N is a MAX 9000 family EEPROM-based Complex Programmable Logic Device (CPLD) from Altera with 320 macrocells, 484 flip-flops, and a 20 ns pin-to-pin propagation delay in a 208-pin PQFP package. According to the Altera MAX 9000 datasheet, it offers 5.0 V in-system programmability through a built-in IEEE Std. 1149.1 JTAG interface.
What is the propagation delay of the EPM9320RI208-20N?
The EPM9320RI208-20N has a pin-to-pin propagation delay (tPD) of 20 ns. The -20 speed grade suffix in the part number denotes this 20 ns rating. This deterministic timing is guaranteed across the industrial temperature range of -40C to +85C, making the device suitable for worst-case-timed glue logic and bus interface designs.
How many macrocells and flip-flops does the EPM9320RI208-20N have?
The EPM9320RI208-20N contains 320 macrocells and 484 flip-flops. The macrocells are organized into Logic Array Blocks (LABs) within the MAX 9000 Multiple Array MatriX architecture. The 484 flip-flops provide ample sequential capacity for state machines, counters, and registered bus interfaces in a single device.
What package does the EPM9320RI208-20N use?
The EPM9320RI208-20N is housed in a 208-terminal Plastic Quad Flat Pack (PQFP) with a 0.500 mm lead pitch. The 208-pin PQFP is a square, surface-mount package with gull-wing terminals. The 'R' in the part number denotes the PQFP package option, and the 208 indicates the terminal count.
Is the EPM9320RI208-20N in-system programmable?
Yes, the EPM9320RI208-20N supports 5.0 V in-system programmability (ISP) through a built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface. This allows configuration and reprogramming after the device is soldered to the PCB, eliminating the need for a separate device programmer and enabling field upgrades.
What is the difference between EPM9320RI208-20N and EPM9320RI208-20?
The EPM9320RI208-20N and EPM9320RI208-20 are functionally identical MAX 9000 CPLDs with the same 320 macrocells, 20 ns speed grade, and 208-pin PQFP package. The trailing 'N' typically denotes a lead-free (RoHS-compliant) package variant, while the non-N version uses the older leaded finish. Both are drop-in compatible on the same PCB footprint.
What is the best drop-in replacement for the EPM9320RI208-20N?
The best drop-in replacement for the EPM9320RI208-20N is the EPM9320RI208-20, which shares the identical 208-pin PQFP footprint, 320 macrocells, and 20 ns speed grade. The EPM9320RI208-10N offers a faster 10 ns speed grade in the same package for timing-critical designs. Both are same-family Altera MAX 9000 devices requiring no PCB changes.
Can the EPM9320RC208-20N replace the EPM9320RI208-20N?
Yes, the EPM9320RC208-20N is a drop-in replacement for the EPM9320RI208-20N. Both are MAX 9000 EPM9320 devices in the 208-pin PQFP package with 320 macrocells and a 20 ns speed grade. The 'C' suffix denotes the commercial temperature grade (0C to +70C) versus the 'I' industrial grade (-40C to +85C), so verify your thermal requirements before substituting.
What is the difference between EPM9320RI208-20N and EPM9320RC208-20N?
The EPM9320RI208-20N and EPM9320RC208-20N differ only in temperature grade. The 'I' suffix indicates industrial temperature range of -40C to +85C, while the 'C' suffix indicates commercial range of 0C to +70C. Both share the 208-pin PQFP package, 320 macrocells, 484 flip-flops, and 20 ns propagation delay, making them pin-to-pin compatible.
When should I choose the EPM9320RI208-20N over the EPM9320RI208-10N?
Choose the EPM9320RI208-20N when your design can tolerate a 20 ns pin-to-pin delay and you want the lower-cost speed grade. Choose the EPM9320RI208-10N when your critical path requires a 10 ns propagation delay, such as high-speed bus interfaces or fast state machines. Both share the same 208-pin PQFP footprint and 320-macrocell density.
Is the EPM9320RI208-20N suitable for industrial applications?
Yes, the EPM9320RI208-20N is rated for the industrial temperature range of -40C to +85C, making it suitable for industrial control, factory automation, and instrumentation applications. Its EEPROM configuration is non-volatile and instant-on, which is advantageous in industrial systems that must resume operation immediately after power-up without a configuration boot sequence.
Where can I download the EPM9320RI208-20N datasheet PDF?
The EPM9320RI208-20N datasheet PDF is available from the Altera datasheet repository at alterasemi.com and from distributor sites such as DigiKey and Octopart. The document covers the MAX 9000 device family, including the EPM9320 architecture, pinout, timing specifications, and operating requirements. Always verify the revision date before design-in.
Where can I find the EPM9320RI208-20N pinout?
The EPM9320RI208-20N pinout is documented in the MAX 9000 device family datasheet available from Altera and distributor sites. The 208-pin PQFP pinout includes dedicated input pins, I/O pins, VCC and GND pins, and JTAG programming pins (TCK, TMS, TDI, TDO). Distributors such as Veswin and Jotrin also provide pinout reference information.
What is the price of the EPM9320RI208-20N?
Pricing for the EPM9320RI208-20N varies by distributor and quantity, and this part is now in the NRND (Not Recommended for New Designs) lifecycle stage, so availability is limited to remaining stock. As of 2026-09-13, no verified unit price was available from the retrieved distributor data. Request a quote from XAIPART or check Octopart for current market pricing.
Where can I buy the EPM9320RI208-20N online?
The EPM9320RI208-20N can be purchased from authorized distributors including DigiKey, Mouser, and Octopart-listed suppliers, as well as specialty stockists such as Jotrin, Veswin, and Microchip USA. As of 2026-09-13, availability is limited because the device is in NRND status. XAIPART can source this part on request; submit a quote for current stock and lead time.
What is the lead time for the EPM9320RI208-20N?
Lead time for the EPM9320RI208-20N depends on distributor stock, as the device is in NRND status and no longer in active production. As of 2026-09-13, no verified lead-time figure was available from the retrieved data. For volume requirements, contact XAIPART or authorized distributors directly to confirm remaining inventory or broker availability.
What are the key specifications of the EPM9320RI208-20N that engineers should know?
The EPM9320RI208-20N is a 5.0 V EEPROM-based CPLD with 320 macrocells, 484 flip-flops, 20 ns pin-to-pin delay, and a 208-pin PQFP package. It supports 3.3 V or 5 V configurable I/O, 5.0 V in-system programmability via IEEE Std. 1149.1 JTAG, and operates from -40C to +85C. VCC must rise monotonically during power-up.
Is the EPM9320RI208-20N the same as the EPM9320RC208-20N?
No, the EPM9320RI208-20N and EPM9320RC208-20N are not identical, though they are pin-compatible. The difference is the temperature grade: 'I' denotes industrial (-40C to +85C) and 'C' denotes commercial (0C to +70C). Both have 320 macrocells, 484 flip-flops, 20 ns delay, and the 208-pin PQFP package, so they are drop-in interchangeable if the commercial temperature range is acceptable.
What is the best Altera equivalent for the EPM9320RI208-20N?
The best Altera equivalent for the EPM9320RI208-20N is the EPM9320RI208-20, which is the same MAX 9000 EPM9320 device with identical 320-macrocell density, 20 ns speed grade, and 208-pin PQFP package. The only difference is the lead-free 'N' suffix. For faster timing, the EPM9320RI208-10N provides a 10 ns speed grade in the same footprint.
What is the operating temperature range of the EPM9320RI208-20N?
The EPM9320RI208-20N operates over the industrial temperature range of -40C to +85C. The 'I' in the part number denotes this industrial grade. This range makes the device suitable for industrial control, factory automation, and outdoor instrumentation, where commercial-grade (0C to +70C) parts would be insufficient.
Does the EPM9320RI208-20N support JTAG boundary scan?
Yes, the EPM9320RI208-20N includes a built-in IEEE Std. 1149.1 Joint Test Action Group (JTAG) interface that supports both in-system programming and boundary-scan testing. The JTAG port uses the standard TCK, TMS, TDI, and TDO signals, allowing board-level interconnect testing and device configuration through a single 4-wire interface.
What is the supply voltage of the EPM9320RI208-20N?
The EPM9320RI208-20N operates from a 5.0 V supply (VCC). Its I/O pins are configurable for 3.3 V or 5 V operation, allowing direct interfacing with both legacy 5 V TTL logic and 3.3 V CMOS devices. According to the MAX 9000 datasheet, VCC must rise monotonically during power-up to ensure correct EEPROM configuration loading.
Is the EPM9320RI208-20N RoHS compliant?
The RoHS compliance status of the EPM9320RI208-20N is not confirmed in the retrieved data. The trailing 'N' suffix in Altera part numbering typically denotes a lead-free (RoHS-compliant) package variant, but this should be verified against the manufacturer's product page or a certificate of compliance before design-in. Contact XAIPART or the distributor for a RoHS declaration.

Справочные инженерные данные для EPM9320RI208-20N — сравнение, рекомендации по проектированию и информация о соответствии.

Руководство по выбору

Choose the EPM9320RI208-20N when you need a 320-macrocell MAX 9000 CPLD in a 208-pin PQFP with industrial temperature range (-40C to +85C), a 20 ns speed grade, and a lead-free package. Choose the EPM9320RI208-20 if your assembly process still permits leaded finishes and you want the closest possible match. Choose the EPM9320RI208-10N when your critical path requires 10 ns timing and the higher speed grade cost is justified. Choose the EPM9320RC208-20N or EPM9320RC208-15N when the application is confined to commercial temperatures (0C to +70C) and you want to reduce cost or gain speed. All six parts share the same 208-pin PQFP footprint and are pin-to-pin compatible, so a single PCB layout supports the entire family. Because the EPM9320 is in NRND status, confirm lifecycle and availability before committing to new production, and consider a modern CPLD migration for long-life designs.

Сравнение с аналогами

Параметр Этот товар EPM9320RI208-20 EPM9320RI208-10N EPM9320RC208-20N EPM9320RC208-15N
Package 208-pin PQFP 208-pin PQFP - same 208-pin PQFP - same 208-pin PQFP - same 208-pin PQFP - same
Brand Altera Altera Altera Altera Altera
Propagation Delay (tPD) 20 ns 20 ns 10 ns 20 ns 15 ns
Macrocells 320 320 320 320 320
Flip-Flops 484 484 484 484 484
Temperature Grade Industrial (-40C to +85C) Industrial (-40C to +85C) Industrial (-40C to +85C) Commercial (0C to +70C) Commercial (0C to +70C)
Supply Voltage (VCC) 5.0 V 5.0 V 5.0 V 5.0 V 5.0 V
In-System Programmability Yes (5.0 V ISP via JTAG) Yes (5.0 V ISP via JTAG) Yes (5.0 V ISP via JTAG) Yes (5.0 V ISP via JTAG) Yes (5.0 V ISP via JTAG)
Configuration Memory EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile) EEPROM (non-volatile)
Lead Finish Lead-free (N suffix) Leaded (non-N) Lead-free (N suffix) Lead-free (N suffix) Lead-free (N suffix)

Ключевые отличия

  • Industrial temperature range with lead-free finish (против EPM9320RC208-20N)
  • 20 ns speed grade at lower cost than 10 ns variant (против EPM9320RI208-10N)
  • Lead-free (N) package finish (против EPM9320RI208-20)
  • Deterministic 20 ns timing versus SRAM FPGA alternatives (против EPM9320RC208-15N)

Заметки по проектированию

VCC must rise monotonically during power-up to guarantee correct EEPROM configuration loading. According to the MAX 9000 datasheet, a non-monotonic ramp can leave the device in an indeterminate state. Use a power-supply supervisor or RC network to ensure a clean 5.0 V ramp. Decouple each VCC pin with a 0.1 uF ceramic capacitor placed within 5 mm of the pin, plus a bulk 10 uF capacitor per device. Estimated: at 5.0 V and typical ICC of a few hundred mA, total decoupling should support transient currents without exceeding 50 mV ripple.

The four dedicated input pins provide low-skew, device-wide distribution for global clock, clear, and output-enable signals. Route these signals as controlled-impedance traces (50 ohm) and keep stub lengths under 10 mm to preserve the low-skew benefit. Do not use general-purpose I/O pins for global clocks, as they route through the programmable interconnect and add delay and skew. Terminate unused dedicated inputs to GND or VCC through a resistor rather than leaving them floating.

Inputs may undershoot to -2.0 V or overshoot to 7.0 V for periods shorter than 20 ns under no-load conditions, but sustained excursions beyond the -0.5 V (I/O) or -0.3 V (dedicated input) minimum DC limits will damage the device. Add series termination resistors (22-33 ohm) on fast-edge signals that drive long traces. Also verify that the JTAG TCK, TMS, TDI, and TDO pins are not loaded by other devices on the scan chain in a way that violates setup/hold timing during ISP.

The 208-pin PQFP package dissipates heat primarily through the package body and leads. Estimated: at 5.0 V and 300 mA ICC, power dissipation is approximately 1.5 W. With a typical theta_JA of 30-40 C/W for a 208-pin PQFP on a multi-layer board, junction temperature rise is roughly 45-60 C above ambient. In a 70 C ambient environment this approaches the 85 C industrial limit, so provide adequate copper area on the VCC and GND planes and ensure airflow in enclosed cabinets.

Place the device centrally on the board to minimize trace lengths to connected peripherals. Keep the JTAG header close to the CPLD and route TCK as a controlled-impedance trace away from noisy switching signals. Use a solid ground plane under the device and avoid routing high-speed signals beneath the package. For the 0.5 mm lead pitch, use a stencil with adequate paste release and verify solder-joint quality with X-ray inspection, as fine-pitch PQFP assembly is prone to bridging.

Информация о соответствии

RoHS
Unknown
REACH
Unknown
AEC-Q100
Not Applicable
Без свинца
Yes
Без галогенов
Unknown
Конфликтные минералы
Unknown

The 'N' suffix in Altera part numbering typically denotes a lead-free package variant, but RoHS/REACH compliance was not confirmed in the retrieved web data. Verify with the manufacturer or distributor certificate of compliance before design-in. AEC-Q100 is not applicable to this industrial-grade CPLD.

Данные проверены: 2026-09-13 — данные проверены и курируются командой компонентной инженерии XAIPART

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Altera Intel EPM9320RI208-20N EPM9320RI208-20 EPM9320RI208-10N EPM9320RC208-20N MAX 9000 CPLD Complex Programmable Logic Device programmable logic device EEPROM IEEE Std. 1149.1 JTAG 208-pin PQFP PQFP surface mount macrocell Logic Array Block propagation delay in-system programmability industrial temperature range RoHS glue logic bus interface state machine
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