EP2AGZ300FF35I3G vs EP2AGZ300FF35C4N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EP2AGZ300FF35I3G sa pamamagitan ng Intel at EP2AGZ300FF35C4N sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EP2AGZ300FF35I3G | EP2AGZ300FF35C4N |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Aktibo | Obsolete |
| Family | Arria II GZ | — |
| Logic Elements (LE) | 300000 | — |
| Number of User I/O | 554 (maximum) | — |
| Number of Transceivers | 8 | — |
| Transceiver Data Rate | Up to 6.375 Gbps | — |
| Process Node | 40 nm | — |
| Temperature na Operasyon | -40C to +100 C (I3 industrial) | — |
| Packhaging | 1152-ball FBGA (FF35) | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Volte ng Pagbibigay | [DATA_NEEDED: core and I/O supply voltage values] | — |
| Embedded Memory (Mbits) | 16.4 | — |
| DSP Blocks | [DATA_NEEDED: number of DSP blocks] | [DATA_NEEDED: number of DSP blocks] |
| PLLs | [DATA_NEEDED: number of PLLs] | [DATA_NEEDED: PLL count] |
| Memory Interfaces | DDR3, QDRII+, RLDRAM II | — |
| Configuration Method | Serial, Parallel, JTAG | — |
| Tindminan RoHS | Compliant | Compliant (per Besenchips / DigiKey listing) |
| Level ng MSL | 3 (168 hours) | — |
| Lead-Free | Yes | — |
| Series | — | Arria II GZ |
| Logic Elements | — | 298,000 |
| Logic Array Blocks (LABs) | — | 11,920 |
| Embedded Memory (bits) | — | 18,854,912 (~17.9 Mbit) |
| User I/O Count | — | 554 |
| Number of I/O Banks | — | [DATA_NEEDED: number of I/O banks] |
| Process Technology | — | 40 nm |
| Core Voltage | — | 0.9 V |
| Package Type | — | 1152-BBGA, FCBGA (flip-chip) |
| Terminal Form | — | Ball |
| Package Code (JEDEC) | — | HBGA |
| Operating Temperature Grade | — | Commercial (C4 = 0C to +85C) |
| Configuration Memory | — | SRAM-based (volatile, requires boot device) |
| Transceivers | — | Multi-gigabit transceivers integrated |
| Lead-Free Status | — | Lead free (per Besenchips listing) |
| Maximum Operating Frequency | — | 500 MHz |