EP1810GC-35 vs EP1810JI-35 Karşılaştırma

Ayrıntılı yan yana karşılaştırma EP1810GC-35 tarafından Altera ve EP1810JI-35 tarafından IntelAnahtar özellikleri, elektriksel parametreleri, ambalajı, yaşam döngüsü durumu, fiyatlandırma ve mevcudiyeti karşılaştırarak tasarım gereksinimleriniz için en iyi bileşeni belirleyin.

Altera
EP1810GC-35 EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 - UV PLD, 40ns, CMOS, CPGA68 | Altera / Rochester

EP1810GC-35 ⚠ Son Satın Alma

Özellik Karşılaştırması

Parametre EP1810GC-35 EP1810JI-35
Marka Altera Intel
Kategori FPGA & CPLD FPGA & CPLD
Yaşam Döngüsü Durumu Son Alış Zamanı Obsolete
Device Type EPLD (Erasable Programmable Logic Device) —
Logic Family Altera Classic EPLD —
Technology CMOS, UV-erasable EPROM cells —
Paket CPGA-68 (Ceramic Pin Grid Array, 68-pin) 28-pin JLCC (J-leaded ceramic, windowed)
Pin Sayısı 68 —
Propagation Delay (tpd max) 40 ns —
Maximum Inputs 64 —
Maximum Outputs 48 —
Macrocells 16 48
I/O Standard TTL-compatible —
Programming Method UV erasure + EPROM programming —
İşletim Sıcaklığı [DATA_NEEDED: operating temperature range] -40C to +85C (Industrial)
Besleme Gerilimi [DATA_NEEDED: VCC range] 5 V (typical classic EPLD)
Montaj Türü Through Hole Through-Hole (J-lead)
RoHS Durumu Not applicable (legacy ceramic package) [DATA_NEEDED: RoHS compliance for ceramic windowed JLCC]
Lead-Free Status Not applicable —
Manufacturer (current source) Rochester Electronics (authorized Altera EPLD partner) —
Original Manufacturer Altera Corporation (now Intel FPGA) —
Device Family — Classic EPLD
Logic Array Blocks — 8 LABs of 16 macrocells
Dedicated Inputs — 48
Pin-to-Pin Propagation Delay (tPD) — 35 ns
Speed Grade — -35
Process Technology — CMOS EPROM (UV-erasable)
Programmability — UV-erase, windowed for lab reprogram
MSL Seviyesi — [DATA_NEEDED: MSL rating]
Programming Interface — JEDEC fuse file via legacy programmer

Dökümanlar & Kaynaklar

Tüm Ürünleri Gözden Geçir BOM Oluştur Teklif İsteyin