EP2A25F672I6 vs EP2A25F672C7N 比較

詳細並排比較 EP2A25F672I6 由 Intel 與 EP2A25F672C7N 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況,以找出最符合您設計需求的元件。

規格比較

參數 EP2A25F672I6 EP2A25F672C7N
品牌 Intel Altera
類別 FPGA & CPLD FPGA & CPLD
生命週期狀態 NRND Obsolete
Family APEX II APEX II
Logic Elements (typical gates) 25,000 —
Fabric Architecture SRAM-based LUT —
Process Technology 0.18 µm CMOS 0.15 µm all-layer copper (up to 8 metal layers)
封裝 672-ball FineLine BGA (FBGA-672) —
Core Voltage 1.5 V —
Configuration Method External SRAM configuration device (EPC series) —
Temperature Grade Industrial (-40 °C to +100 °C ambient) —
Speed Grade 6 —
Embedded Memory Embedded System Blocks (ESB), dual-port RAM / CAM Embedded System Blocks (ESB) configurable as dual-port RAM/ROM
DSP Blocks MultiCore dedicated multipliers —
Boundary Scan JTAG (IEEE 1149.1) compliant —
Clock Management Dedicated PLL / clock tree circuitry —
I/O Bank Count [DATA_NEEDED: number of user I/O banks] —
RoHS 狀態 [DATA_NEEDED: RoHS compliance status] [DATA_NEEDED: RoHS compliance]
Lead-Free [DATA_NEEDED: lead-free status] —
MSL 等級 [DATA_NEEDED: moisture sensitivity level] —
安裝類型 Surface Mount (BGA) Surface Mount
Logic Elements — 24,320 cells
System Gates — Approximately 900,000
User I/Os — 492
Propagation Delay (tPD) — 1.69 ns
Internal Operating Frequency — Up to 500 MHz
Core Voltage (VCCINT) — 1.5 V
Logic Family — CMOS
Package Type — 672-ball FC-FBGA (FineLine BGA)
Package Body Size — 27 x 27 mm
Ball Pitch — 1.0 mm
工作溫度 — 0 °C to 85 °C (commercial)
High-Speed I/O Support — True-LVDS, LVPECL, PCML, HyperTransport up to 1 Gbps
Programmable Logic Type — Loadable PLD (in-system programmable)
PLLs — Up to 4

資料表與資源

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