H5AN8G6NAFR-PBC vs H5AN8G6NAFR-UHC 比較
詳細並排比較 H5AN8G6NAFR-PBC 由 SK hynix 與 H5AN8G6NAFR-UHC 由 SK hynix. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | H5AN8G6NAFR-PBC | H5AN8G6NAFR-UHC |
|---|---|---|
| 品牌 | SK hynix | SK hynix |
| 類別 | Memory ICs | Memory ICs |
| 生命週期狀態 | 啟用中 | 啟用中 |
| 記憶體類型 | DDR4 SDRAM | DDR4 SDRAM (CMOS) |
| Density | 8 Gbit | — |
| 組織 | 512M x 16 | 512M x 16 |
| VDD Supply Voltage | 1.20 V +/- 0.06 V | — |
| VDDQ Supply Voltage | 1.20 V +/- 0.06 V | — |
| VPP Supply Voltage | 2.5 V +0.25/-0.125 V | — |
| 介面類型 | DDR4 (parallel, double data rate) | — |
| Speed Bins Supported | DDR4-1600 / 1866 / 2133 / 2400 (datasheet speed bin tables) | — |
| Refresh | Auto / Self Refresh | Auto self-refresh |
| DLL | DLL ON mode for speed bin operation | — |
| Clock | Differential clock (CK/CK#) | — |
| 封裝 | TFBGA-96 (rectangular) | 96-ball FBGA (TFBGA) |
| Number of Terminals | 96 | — |
| 安裝類型 | Surface Mount | Surface Mount |
| 工作溫度 | [DATA_NEEDED: operating temperature range] | 0C to +85C |
| RoHS 狀態 | Compliant (Lead-Free & Halogen-Free) | [DATA_NEEDED: RoHS status] |
| Composition | CMOS | — |
| Memory Density | — | 8 Gbit |
| 供應電壓 | — | 1.2 V |
| 資料速率 | — | 2400 MT/s |
| Clock Architecture | — | Differential clock (CK_t / CK_c), fully synchronous |
| Precharge | — | Auto precharge function |
| Reset | — | Asynchronous reset function |
| Data Mask | — | DM function supported |
| Termination | — | Dynamic on-chip termination (ODT) |
| Calibration | — | ZQ calibration function |
| Error Checking | — | CRC function |
| Write Leveling | — | Write leveling function supported |