10CX105YF672I6G - Cyclone 10 GX FPGA, 105K LE, 672-BGA | Intel
MPN： 10CX105YF672I6G ✓ 啟用中10CX105YF672I6G 概覽
A Field Programmable Gate Array (FPGA) is a class of programmable logic device that allows designers to configure arbitrary digital logic, memory blocks, and I/O protocols after PCB fabrication. Cyclone 10 GX FPGAs are positioned in Intel's mid-range portfolio for cost-sensitive applications requiring integrated transceivers (up to 12.5 Gbps), hard PCIe Gen2 controllers, and a rich DSP block fabric. They occupy a tier between low-power Cyclone 10 LP parts and high-end Stratix 10 devices, balancing logic density against power and unit cost.
Key features of the 10CX105YF672I6G include a 105K LE fabric optimized for parallel processing pipelines, hard memory controllers for DDR3/DDR4/LPDDR3 external memory interfaces, up to 3.75 Gbps LVDS-capable GPIO, and embedded PCI Express Gen2 x4 hard IP. The 672-pin FCBGA package exposes 236 general-purpose I/Os and 12 transceiver channels for high-speed serial connectivity. Configuration is supported via JTAG, AS, PS, and FPP modes through dedicated configuration pins.
Typical applications include industrial machine vision, video broadcasting, factory automation controllers, low-cost 10G Ethernet aggregation, software-defined radio front-ends, and PCIe-based accelerator cards. The combination of transceiver channels, hard PCIe cores, and DSP blocks makes it a versatile fabric for protocol bridging and parallel compute offload. The industrial temperature grade supports deployment in factory floor and outdoor enclosures without additional thermal derating.
When designing with the 10CX105YF672I6G, ensure PCB design follows Intel's FCBGA land pattern and high-speed transceiver routing guidelines. Power supply sequencing requires careful ramp coordination between core and I/O rails to avoid in-rush current damage. Use Intel Quartus Prime software for synthesis, place-and-route, and bitstream generation. Thermal management relies primarily on PCB copper and forced airflow; the package does not integrate a discrete heatsink.
This page synthesizes distributor pricing, drop-in Cyclone 10 GX alternatives, and PCB layout considerations not consolidated on the manufacturer product page. All specifications are sourced from the verified Intel/Altera Cyclone 10 GX device datasheet and current distributor listings as of 2026-09-05.
直接替換替代品，適用於 10CX105YF672I6G — 相同封裝，腳位對腳位相容。需重新設計 PCB 的不同封裝零件不列入。
此系列的變體
與下列產品可直接替換的同系列型號： 10CX105YF672I6G （相同外形與佔位） — 差異在於 Package, Logic Elements (LE), Operating Temperature, Adaptive Logic Modules (ALM), Speed Grade.
10CX105YF672I5G
✅ 直接替換聯絡詢價
查看資料表 →10CX105YF672E6G
✅ 直接替換聯絡詢價
查看資料表 →10CX105YF672E5G
✅ 直接替換聯絡詢價
查看資料表 →10CX085YF672I6G
✅ 直接替換聯絡詢價
查看資料表 →10CX150YF672I5G
✅ 直接替換聯絡詢價
查看資料表 →10CX105YF672I6G 最大額定值與電氣特性
| Series | Cyclone® 10 GX |
| Logic Elements (LE) | 104,000 |
| Adaptive Logic Modules (ALM) | 3,800 ALM |
| Embedded Memory | 7.46 Mbit |
| Embedded Memory Bits | 8,641,536 bits |
| Number of User I/Os | 236 |
| 封裝 | 672-BBGA, FCBGA (F672) |
| 安裝類型 | Surface Mount |
| Operating Supply Voltage (Core) | 900 mV |
| 工作溫度 | -40°C to +85°C (Industrial) |
| Temperature Grade | Industrial (I) |
| Speed Grade | 6 |
| Process Technology | TSMC 20 nm |
| Lead Free / RoHS | Yes (RoHS compliant) |
| Configuration Method | JTAG / AS / PS / FPP |
10CX105YF672I6G 672-bbga, fcbga (f672) 腳位配置指南
10CX105YF672I6G（672-bbga, fcbga (f672) 封裝）的腳位配置。 此數位 IC 包含 GPIO、通訊介面（UART、SPI、I2C）與電源腳位。替代腳位功能與配置選項請參閱製造商資料表。對嵌入式系統設計與 PCB 佈局至關重要。
無詳細腳位定義資料： 10CX105YF672I6G.
請參閱 資料表 以查看完整腳位配置。
典型應用
10CX105YF672I6G 適用於 6 應用s: Industrial Machine Vision, Video Broadcasting and Encoding, Factory Automation Controllers, 10 Gigabit Ethernet Aggregation, Software-Defined Radio Front-Ends, PCIe-Based Accelerator Cards.
Industrial Machine Vision
The 10CX105YF672I6G is well-suited for industrial machine vision systems requiring real-time image processing on multiple parallel video streams. With 104K logic elements, 3,800 ALMs, and 12 transceiver channels up to 12.5 Gbps, the FPGA can ingest data from MIPI CSI-2, Camera Link, or CoaXPress sensors while running pipeline-parallel image processing (filtering, blob detection, optical flow). The industrial -40°C to +85°C temperature grade allows deployment in factory floor enclosures without active thermal management beyond PCB copper. Its 236 user I/Os support multiple parallel sensor interfaces simultaneously, while the hard PCIe Gen2 x4 IP enables host-side data transfer with minimal CPU overhead. Compared to discrete GPU solutions, this FPGA offers deterministic latency critical for vision-based quality control in high-speed production lines.
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Video Broadcasting and Encoding
Broadcast video encoding applications (e.g., JPEG2000, H.264, HEVC mezzanine compression) benefit from the 10CX105YF672I6G's combination of logic density, DSP blocks, and serial transceiver channels. The 12 transceivers support SDI (3G/12G-SDI over coax), HDMI 2.0 bridging, or 10 Gigabit Ethernet for IP-based video transport. Hard PCIe Gen2 enables direct host offload in server-class encoders. The 105K LE fabric comfortably hosts multiple encoder cores, audio embedding, and ancillary data processing simultaneously. Industrial temperature rating supports operation in outdoor broadcast trucks and stadium control rooms. Power consumption is significantly lower than equivalent Stratix 10 implementations, fitting the cost-sensitive mid-tier of the broadcast equipment market where the 10CX105YF672I6G's price point is competitive.
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Factory Automation Controllers
Programmable logic controllers and industrial Ethernet gateways leverage the 10CX105YF672I6G to consolidate multiple industrial protocols (EtherCAT, PROFINET, EtherNet/IP) onto a single FPGA fabric. Its 104K logic elements can host multiple industrial slave stacks concurrently, while the 236 user I/Os handle real-time digital I/O, encoder feedback, and motor control PWM. The industrial -40°C to +85°C temperature grade is mandatory for factory cabinet deployment. The 12 transceiver channels support multiple GbE links or one 10G uplinks to supervisory networks. Compared to multi-chip solutions, this single FPGA reduces BOM count, simplifies firmware qualification, and provides deterministic sub-microsecond latency required for closed-loop servo control. The hard PCIe Gen2 IP also enables compact vision-in-the-loop and edge analytics integration.
推薦
10 Gigabit Ethernet Aggregation
The 10CX105YF672I6G is ideal for low-cost 10 Gigabit Ethernet aggregation switches and protocol converters at the network edge. Its 12 transceiver channels support up to six 10G SFP+ uplinks or twelve 1G SFP ports with line-rate processing. The hard PCIe Gen2 x4 IP allows tight integration with host CPUs or SoCs in hybrid switching platforms. With 7.46 Mbit of embedded memory, the device can buffer multiple 10G line-rate streams while running MAC, VLAN, and basic ACL processing in fabric. Industrial temperature grade suits outdoor telecom cabinets and small-cell backhaul applications. The cost/performance point positions this FPGA between discrete PHY/MCU solutions and full merchant switch silicon, ideal for custom OEM networking equipment with mixed layer-2/3 functionality.
推薦
Software-Defined Radio Front-Ends
Software-defined radio (SDR) platforms leverage the 10CX105YF672I6G's transceiver channels and DSP blocks for digital down-conversion, channelization, and baseband processing. The 12 transceivers up to 12.5 Gbps can digitize wide-band RF signals directly from high-speed ADCs, supporting LTE, 5G NR sub-6, and proprietary waveform protocols. The 104K logic elements host multiple DDC/DUC chains, channel filters, and FFT cores. Hard PCIe Gen2 x4 enables direct connection to host processors for protocol stack implementation. The industrial temperature grade supports outdoor SDR deployments (private LTE base stations, military communications, spectrum monitoring). Compared to dedicated DSP processors, this FPGA offers 5-10x higher sample-rate throughput at comparable power, while providing flexibility to support evolving waveforms.
推薦
PCIe-Based Accelerator Cards
The 10CX105YF672I6G's hard PCIe Gen2 x4 IP makes it a strong choice for low-cost accelerator cards targeting financial computing, genomics, machine learning inference, and database acceleration. The 105K logic elements can host custom compute pipelines (e.g., Smith-Waterman alignment, AES encryption, neural-network inference engines) that offload work from host CPUs. The 12 transceivers support both the PCIe link and additional high-speed I/O to host (DMA) or to other cards (peer-to-peer). Industrial temperature rating supports server-room and edge data center deployment. Compared to GPU accelerators, this FPGA offers deterministic latency and significantly lower power per operation for fixed-function workloads. The 7.46 Mbit embedded memory is sufficient for caching intermediate results in streaming pipelines.
推薦
推薦產品摘要
工程參考資料，適用於 10CX105YF672I6G — 比較、設計指引及合規資訊。
選型指南
與替代品比較
| 參數 | 本產品 | 10CX105YF672I5G | 10CX105YF672E6G | 10CX105YF672E5G | 10CX085YF672I6G | 10CX150YF672I5G |
|---|---|---|---|---|---|---|
| Brand | Intel | Intel | Intel | Intel | Intel | Intel |
| Package | 672-BBGA, FCBGA (F672) | 672-BBGA, FCBGA (F672) - same | 672-BBGA, FCBGA (F672) - same | 672-BBGA, FCBGA (F672) - same | 672-BBGA, FCBGA (F672) - same | 672-BBGA, FCBGA (F672) - same |
| Logic Elements | 104,000 LE | 104,000 LE - same | 104,000 LE - same | 104,000 LE - same | 85,000 LE (-19%) | 150,000 LE (+44%) |
| Speed Grade | -6 | -5 (faster) | -6 - same | -5 (faster) | -6 - same | -5 (faster) |
| Temperature Grade | Industrial (-40°C to +85°C) | Industrial - same | Enhanced (E) | Enhanced (E) | Industrial - same | Industrial - same |
| Embedded Memory | 7.46 Mbit | 7.46 Mbit - same | 7.46 Mbit - same | 7.46 Mbit - same | 6.62 Mbit | 8.47 Mbit |
| User I/Os | 236 | 236 - same | 236 - same | 236 - same | 236 - same | 236 - same |
| RoHS / Lead-Free | Yes (RoHS compliant) | Yes - same | Yes - same | Yes - same | Yes - same | Yes - same |
主要差異化特點
- Higher logic density than 10CX085 family variants (對比10CX085YF672I6G)
- Industrial temperature grade at -6 speed grade (對比10CX105YF672E6G)
- Lower cost than 10CX150 family variants (對比10CX150YF672I5G)
設計說明
The 672-ball FCBGA package requires a high-density PCB with 1.0 mm ball pitch and matched-impedance traces for the transceiver channels. Intel provides reference PCB stack-ups in the Cyclone 10 GX Hardware Reference Manual. Use 0.5 oz copper in the core and 1 oz on outer layers; 6-8 layer stack-up is recommended. Decoupling requires 10-22 μF bulk + 0.1 μF + 1 nF per power pin per Intel's pin connection guidelines.
Estimated: at typical Cyclone 10 GX utilization (60% LEs, 80% transceivers active), core power is approximately 4-6 W. The FCBGA package has a θJA of approximately 14-18 °C/W with adequate PCB thermal vias and copper pour. Industrial temperature design must keep junction below 85°C ambient; recommend 200-400 LFM airflow or large thermal copper pad with 25-50 thermal vias under the BGA.
Do not mix core and I/O power ramp sequences arbitrarily - Intel requires specific power sequencing (VCC core first, then VCCIO, then transceivers) per AN692. The MSEL[2:0] pins must be set correctly to select the configuration mode (JTAG/AS/PS/FPP) at board reset. Differential transceiver channels require DC-blocking capacitors and matched-length routing within 0.025 mm tolerance. Misconfigured MSEL or missing reference-clock termination is a common first-prototype failure.
合規資訊
RoHS compliant per 'G' suffix in MPN. Lead-free FCBGA assembly. AEC-Q100 not applicable for FPGAs. Halogen-free status not confirmed in verified data - set to 'unknown'.
