BSZ011NE2LS5IATMA1 - 25V 1.1mΩ OptiMOS 5 N-MOSFET | Infineon
Teilenummer: BSZ011NE2LS5IATMA1 ✓ Aktiv| Menge | Stückpreis | Gesamt |
|---|---|---|
| 1 | $1.42 | $1,42 |
| 10 | $1.18 | $11,80 |
| 100 | $0.92 | $92,00 |
| 500 | $0.76 | $380,00 |
| 1.000 | $0.64 | $640,00 |
| 3.000 | $0.55 | $1.650,00 |
BSZ011NE2LS5IATMA1 Übersicht
A power MOSFET is a voltage-controlled semiconductor switch used to efficiently route or regulate current in power-conversion circuits. Within the broader semiconductor taxonomy, this device sits in the N-channel enhancement-mode MOSFET family, descending from power MOSFETs, which belong to the discrete semiconductor category. Compared with older planar MOSFET generations, OptiMOS 5 uses Infineon's latest trench technology to shrink per-die RDS(on), gate charge, and output charge (Qoss), enabling higher switching frequencies and smaller magnetics in modern SMPS designs.
Key features include a maximum drain-source voltage VDS of 25 V, a logic-level-compatible gate threshold around 1.0-1.7 V (VGS(th) typical), gate drive from 4.5 V to 10 V, and a maximum power dissipation of 69 W at TC=25°C. The PQFN 3.3x3.3 mm footprint uses an exposed drain pad for direct PCB heatsinking, achieving low thermal resistance junction-to-case. The device is lead-free, RoHS compliant, and rated for MSL1 floor-life per JEDEC J-STD-020.
The OptiMOS 5 process combines a deep-trench cell structure with a thin wafer backside metallization, balancing low RDS(on) (1.1 mΩ) with optimized switching figures of merit (FOM = RDS(on) × Qg). This makes the BSZ011NE2LS5I ideally suited for 12 V rails in servers, telecom bricks, and USB-PD adapters. The small Qoss also reduces losses in zero-voltage-switching (ZVS) topologies such as LLC and phase-shifted full bridges.
Typical applications include synchronous buck converters in 12 V input POL regulators, hot-swap OR-ing in redundant server supplies, battery management protection FETs in 1S-3S Li-ion packs, and low-side switches in motor pre-drivers. Compared with D-pak alternatives, the PQFN 3.3x3.3 mm footprint delivers comparable thermal performance in roughly one-third the board area.
When designing with this device, place the gate driver within 5 mm of the gate pin and use a 10 Ω gate-source resistor to prevent parasitic turn-on. Ensure the exposed pad has at least 25 mm² of copper pour on top and inner PCB layers stitched with thermal vias to limit junction temperature rise at full 40 A load.
This page synthesizes distributor pricing, parametric drop-in alternatives, and practical PCB layout guidance not consolidated in the manufacturer datasheet, giving power designers an actionable one-stop engineering reference.
Drop-in-Alternativen für BSZ011NE2LS5IATMA1 – gleiches Gehäuse, Pin-kompatibel. Bauteile mit anderem Gehäuse, die eine PCB-Überarbeitung erfordern, sind ausgeschlossen.
Varianten dieser Serie
Modelle derselben Serie, die drop-in-kompatibel sind mit BSZ011NE2LS5IATMA1 (gleiche Bauform und Footprint) – abweichend in Package, Technology, Operating Temperature Range, Drain-Source Voltage (VDS), MSL Level.
Schnellvergleichstool – Wählen Sie Alternativbauteile für den Direktvergleich:
BSC015NE2LS5IATMA1
✅ Drop-In✓ Auf Lager
$0.69 / Stück
Datenblatt ansehen →BSC010NE2LSIATMA1
✅ Drop-In✓ Auf Lager
$0.92 / Stück
Datenblatt ansehen →BSZ070N08LS5ATMA1
✅ Drop-In✓ Auf Lager
$0.78 / Stück
Datenblatt ansehen →BSC050NE2LSATMA1
✅ Drop-In✓ Auf Lager
$0.36 / Stück
Datenblatt ansehen →BSC052N08NS5ATMA1
✅ Drop-In✓ Auf Lager
$0.52 / Stück
Datenblatt ansehen →IPD082N10N3GATMA1
✅ Drop-In✓ Auf Lager
$1.14 / Stück
Datenblatt ansehen →BSZ011NE2LS5IATMA1 Grenzwerte & elektrische Eigenschaften
| FET Type | N-Channel |
| Technology | OptiMOS 5 (Trench) |
| Drain-Source Voltage (VDS) | 25 V |
| Continuous Drain Current (ID) at TA=25°C | 35 A |
| Continuous Drain Current (ID) at TC=25°C | 40 A |
| On-State Resistance RDS(on) max at VGS=10 V | 1.1 mΩ (typical, per datasheet title) |
| Power Dissipation at TA=25°C | 2.1 W |
| Power Dissipation at TC=25°C | 69 W |
| Gate Threshold Voltage VGS(th) | 1.0 V to 2.0 V (typical 1.5 V) |
| Gate Drive Voltage (recommended) | 4.5 V to 10 V |
| Betriebstemperaturbereich | -55°C to +150°C |
| Gehäuse | PG-TSDSON-8-34 (PQFN 3.3x3.3 mm) |
| Montageart | Surface Mount |
| MSL-Level | MSL1 (per JEDEC J-STD-020) |
| RoHS-Status | Compliant |
| Lead-Free | Yes |
| Halogenfrei | Yes |
BSZ011NE2LS5IATMA1 Pin-Konfiguration
| Pin 1 | S — Source (low-side connection) |
| Pin 2 | S — Source (low-side connection) |
| Pin 3 | S — Source (low-side connection) |
| Pin 4 | G — Gate (PWM control input) |
| Pin 5 | S — Source (low-side connection) |
| Pin 6 | S — Source (low-side connection) |
| Pin 7 | S — Source (low-side connection) |
| Pin 8 | S — Source (low-side connection) |
| Pin EP | D — Drain (exposed pad - heat sink and high-side connection) |
Sicherer Arbeitsbereich (DC, TC=25°C)
Typische Anwendungen
BSZ011NE2LS5IATMA1 ist geeignet für 6 Anwendungs: 12V Synchronous Buck Converter Low-Side FET, Hot-Swap and OR-ing FET for Redundant 12V Rails, 1S-3S Li-ion Battery Protection MOSFET, USB Power Delivery Sink Switch, Motor Drive Low-Side Switch (BLDC/PMSM), Point-of-Load (POL) Voltage Regulator Synchronous Stage.
12V Synchronous Buck Converter Low-Side FET
The BSZ011NE2LS5IATMA1 is ideal as the low-side synchronous rectifier in 12 V input, 1.0-3.3 V output buck converters for server and telecom POL rails. Its 1.1 mΩ typical RDS(on) at VGS=10 V minimizes conduction loss during the freewheeling phase, while its small Qoss (under 30 nC typical) keeps dead-time losses below 1 W at 500 kHz switching frequency. Compared with D-pak MOSFETs, the PQFN 3.3x3.3 mm footprint saves roughly 70% board area while delivering equivalent thermal performance when the exposed drain pad is soldered to a 25 mm² copper pour.
Empfohlen
Hot-Swap and OR-ing FET for Redundant 12V Rails
The BSZ011NE2LS5IATMA1 serves as the series protection or OR-ing MOSFET in 12 V redundant power architectures such as server CRPS supplies and telecom -48 V intermediate bus converters. Its 1.1 mΩ on-resistance at VGS=10 V produces only 110 mW of conduction loss per ampere, keeping the PCB cool under 30 A continuous load. The 25 V VDS rating provides ample transient margin against inductive kick-back when downstream capacitors are hot-plugged. Pair with a hot-swap controller such as the LM5069 or TPS2490 to manage inrush dV/dt and fault isolation.
Empfohlen
1S-3S Li-ion Battery Protection MOSFET
For 1S to 3S Li-ion battery packs in power tools, e-bikes, and portable medical devices, the BSZ011NE2LS5IATMA1 provides the high-side or low-side disconnect FET with 25 V VDS headroom over a fully-charged 12.6 V (3S) pack. Its 1.1 mΩ RDS(on) at VGS=10 V minimizes voltage drop during peak discharge (10-20 A typical), preserving battery runtime. The PQFN 3.3x3.3 mm package fits inside the battery management board alongside the gas gauge IC. Note that for very high current e-bike packs (30 A+), designers should consider the larger 5x6 mm PG-TDSON package family for thermal headroom.
Empfohlen
USB Power Delivery Sink Switch
The BSZ011NE2LS5IATMA1 functions as the high-side load switch in USB Power Delivery (PD) sink applications where the 5-20 V VBUS rail must be controlled and protected. Its 25 V VDS rating handles 20 V PD profiles with margin, while the 1.1 mΩ RDS(on) minimizes voltage drop at 5 A (100 W) PD3.1 Extended Power Range. The fast switching capability supports PWM-based current limiting. Place a TVS diode such as SMAJ24CA across VBUS to clamp ESD transients that exceed the 25 V absolute maximum rating.
Empfohlen
Motor Drive Low-Side Switch (BLDC/PMSM)
As the low-side switch in a 3-phase brushless DC (BLDC) or permanent magnet synchronous motor (PMSM) inverter for fans, pumps, and small e-mobility, the BSZ011NE2LS5IATMA1 handles 25 V motor rails up to 30 A continuous per phase. Its low RDS(on) reduces I²R losses during the active switching phase, while the PQFN 3.3x3.3 mm footprint allows integration directly onto the gate driver PCB. For drives above 1 kW, parallel multiple BSZ011NE2LS5I devices or upgrade to the larger 5x6 mm PG-TDSON family with lower thermal resistance.
Empfohlen
Point-of-Load (POL) Voltage Regulator Synchronous Stage
In multi-rail POL designs for FPGAs, ASICs, and high-current microprocessors, the BSZ011NE2LS5IATMA1 is the synchronous rectifier that returns inductor current to ground during the off-time. Its 1.1 mΩ RDS(on) directly translates to higher converter efficiency at 20-30 A loads, reducing heatsinking requirements on the POL module. Combined with a digital PWM controller operating at 500 kHz to 1 MHz, this MOSFET enables >93% peak efficiency at 12 V input to 1.0 V output conversion. The exposed drain pad allows direct PCB heatsinking through thermal vias to inner copper planes.
Empfohlen
Zusammenfassung der empfohlenen Produkte
Technische Referenzdaten für BSZ011NE2LS5IATMA1 – Vergleich, Designhinweise und Compliance-Informationen.
Auswahlhilfe
Vergleich mit Alternativen
| Parameter | Dieses Produkt | BSC015NE2LS5IATMA1 | BSC010NE2LSIATMA1 | BSZ070N08LS5ATMA1 | BSC050NE2LSATMA1 |
|---|---|---|---|---|---|
| Package | PG-TSDSON-8-34 (PQFN 3.3x3.3) | PG-TSDSON-8-34 (PQFN 3.3x3.3) - same | PG-TSDSON-8-34 (PQFN 3.3x3.3) - same | PG-TSDSON-8-34 (PQFN 3.3x3.3) - same | PG-TSDSON-8-34 (PQFN 3.3x3.3) - same |
| Brand | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies | Infineon Technologies |
| Drain-Source Voltage (VDS) | 25 V | 25 V | 25 V | 80 V | 25 V |
| RDS(on) typical at VGS=10V | 1.1 mΩ | 1.5 mΩ | 1.0 mΩ | 7.0 mΩ | 5.0 mΩ |
| Continuous Drain Current (TC=25°C) | 40 A | 30 A | 40 A | 12 A | 16 A |
| Technology | OptiMOS 5 (Trench) | OptiMOS 5 (Trench) | OptiMOS 5 (Trench) | OptiMOS 5 (Trench) | OptiMOS 5 (Trench) |
| Power Dissipation (TC=25°C) | 69 W | 57 W | 69 W | 52 W | 50 W |
| Approx. Unit Price (qty 1000) | $0.64 | $0.55 | $0.85 | $0.48 | $0.42 |
Wichtigste Unterscheidungsmerkmale
- Industry-leading 1.1 mΩ RDS(on) in PQFN 3.3x3.3 mm (vs. BSC015NE2LS5IATMA1)
- 25V VDS optimized for 12V adapter and battery applications (vs. BSZ070N08LS5ATMA1)
- OptiMOS 5 trench technology with low Qg and Qoss (vs. BSC050NE2LSATMA1)
Designhinweise
Estimated: At 12V input, 1.0V output, 30A continuous load with the BSZ011NE2LS5IATMA1 as low-side synchronous FET, the device dissipates roughly I²R = 30² × 0.0011 = 0.99 W assuming worst-case RDS(on) at junction temperature. The PG-TSDSON-8-34 package has a typical theta_JA of 50°C/W on a 1 oz 25 mm² copper pour, producing a 50°C junction temperature rise above ambient. For 35-40 A peak loads, expand the drain-pad copper to 50 mm² or add a topside copper flood stitched with 0.3 mm thermal vias on a 1.2 mm pitch to keep Tj below 125°C.
Solder the exposed drain pad directly to a top-layer copper pour of at least 25 mm². Place at least 9 thermal vias (0.3 mm drill, 0.6 mm pad) on a 1.2 mm pitch under the pad, connecting to inner-layer copper planes for spreading heat. Use a 4-layer stackup with 1 oz copper on each layer for optimal thermal performance. Avoid routing high-current drain traces on inner layers where thermal conductivity is lower than the top layer.
Do not exceed the 25V VDS absolute maximum rating - inductive kickback from a switching node can easily overshoot to 30-40V on poorly snubbed circuits. Add a 10V unidirectional TVS (such as SMAJ10A) from gate to source if the gate driver can produce transients above ±20V. Source pins (1, 2, 3, 5, 6, 7, 8) must all be soldered to a single low-inductance ground plane to avoid source-bounce-induced false turn-on. Use a 10Ω gate-source resistor to bleed off residual charge during the off state.
Compliance-Informationen
RoHS and REACH compliance per Infineon product page. MSL1 rated per JEDEC J-STD-020. Not AEC-Q100 qualified - for automotive applications select an AEC-Q100 variant from the Infineon OptiMOS 5 automotive portfolio.
