EPM5192LC-1 vs EPM5192LC-35 Perbandingan

Perbandingan bersamaan detil EPM5192LC-1 dari Altera dan EPM5192LC-35 dari Altera. Bandingkan spesifikasi penting, parameter listrik, pengemasan, status cycle, harga, dan ketersediaan untuk menentukan komponen terbaik untuk kebutuhan desain Anda.

Perbandingan Spesifikasi

Parameter Umum EPM5192LC-1 EPM5192LC-35
Merek Altera Altera
Kategori FPGA & CPLD FPGA & CPLD
Status Lingkungan Hidup Obsolete Obsolete
Family MAX 5000 MAX 5000 CPLD
Device Type EPLD / CPLD —
Macrocells 192 —
Logic Gates 3750 (typical usable) —
Dedicated Inputs 7 —
User I/O 64 —
Jumlah Pin 84 —
Package Type LDCC (Leaded Ceramic Chip Carrier), plastic windowless JLCC (J-Lead Ceramic Chip Carrier)
Propagation Delay 25 ns —
Frekuensi Bawah Maximum 50 MHz —
Tegangan Pemuat 5 V nominal (4.75 V to 5.25 V) —
Technology CMOS, UV-erasable / OTP EPROM cell —
Suhu Kerja 0C to +70C (commercial) Commercial (0C to +70C) per LC suffix
Programmable Memory EPROM (one-time or UV-erasable) —
Speed Grade -1 -35
Status RoHS Non-compliant (ceramic LDCC with Pb-bearing terminations) Non-compliant (ceramic hermetic package)
Series — MAX 5000
Logic Elements / Macrocells — 192 macrocells
Pin-to-Pin Delay (tPD) — 35 ns
Programmable Type — UV-Erasable / OTP (EPROM-based)
Tipe Mounting — Surface Mount
Logic Voltage — 5 V TTL-compatible I/O
Programming Method — Altera legacy programmer (EPROM-based)
Architecture — LAB-based with Programmable Interconnect Array (PIA)
I/O Standard — TTL
Status Lingkungan Hidup — Obsolete - last-time-buy stock only
Datasheet Document — Altera MAX 5000 family datasheet (per alldatasheet.com)

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