EPM5192LC-1 vs EPM5192LC-35 比較
詳細並排比較 EPM5192LC-1 由 Altera 與 EPM5192LC-35 由 Altera. 比較關鍵規格、電氣參數、封裝、生命週期狀態、價格與供貨情況，以找出最符合您設計需求的元件。
規格比較
| 參數 | EPM5192LC-1 | EPM5192LC-35 |
|---|---|---|
| 品牌 | Altera | Altera |
| 類別 | FPGA & CPLD | FPGA & CPLD |
| 生命週期狀態 | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 CPLD |
| Device Type | EPLD / CPLD | — |
| Macrocells | 192 | — |
| Logic Gates | 3750 (typical usable) | — |
| Dedicated Inputs | 7 | — |
| User I/O | 64 | — |
| 腳位數 | 84 | — |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | JLCC (J-Lead Ceramic Chip Carrier) |
| Propagation Delay | 25 ns | — |
| 最大時脈頻率 | 50 MHz | — |
| 供應電壓 | 5 V nominal (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP EPROM cell | — |
| 工作溫度 | 0C to +70C (commercial) | Commercial (0C to +70C) per LC suffix |
| Programmable Memory | EPROM (one-time or UV-erasable) | — |
| Speed Grade | -1 | -35 |
| RoHS 狀態 | Non-compliant (ceramic LDCC with Pb-bearing terminations) | Non-compliant (ceramic hermetic package) |
| Series | — | MAX 5000 |
| Logic Elements / Macrocells | — | 192 macrocells |
| Pin-to-Pin Delay (tPD) | — | 35 ns |
| Programmable Type | — | UV-Erasable / OTP (EPROM-based) |
| 安裝類型 | — | Surface Mount |
| Logic Voltage | — | 5 V TTL-compatible I/O |
| Programming Method | — | Altera legacy programmer (EPROM-based) |
| Architecture | — | LAB-based with Programmable Interconnect Array (PIA) |
| I/O Standard | — | TTL |
| 生命週期狀態 | — | Obsolete - last-time-buy stock only |
| Datasheet Document | — | Altera MAX 5000 family datasheet (per alldatasheet.com) |