EPM5192LC-1 vs EPM5192LC-35 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM5192LC-1 sa pamamagitan ng Altera at EPM5192LC-35 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM5192LC-1 | EPM5192LC-35 |
|---|---|---|
| Brand | Altera | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Family | MAX 5000 | MAX 5000 CPLD |
| Device Type | EPLD / CPLD | — |
| Macrocells | 192 | — |
| Logic Gates | 3750 (typical usable) | — |
| Dedicated Inputs | 7 | — |
| User I/O | 64 | — |
| Bilang ng Pins | 84 | — |
| Package Type | LDCC (Leaded Ceramic Chip Carrier), plastic windowless | JLCC (J-Lead Ceramic Chip Carrier) |
| Propagation Delay | 25 ns | — |
| Maksimum na Taktiko ng Oras | 50 MHz | — |
| Volte ng Pagbibigay | 5 V nominal (4.75 V to 5.25 V) | — |
| Technology | CMOS, UV-erasable / OTP EPROM cell | — |
| Temperature na Operasyon | 0C to +70C (commercial) | Commercial (0C to +70C) per LC suffix |
| Programmable Memory | EPROM (one-time or UV-erasable) | — |
| Speed Grade | -1 | -35 |
| Tindminan RoHS | Non-compliant (ceramic LDCC with Pb-bearing terminations) | Non-compliant (ceramic hermetic package) |
| Series | — | MAX 5000 |
| Logic Elements / Macrocells | — | 192 macrocells |
| Pin-to-Pin Delay (tPD) | — | 35 ns |
| Programmable Type | — | UV-Erasable / OTP (EPROM-based) |
| Uri ng Pagpapasok | — | Surface Mount |
| Logic Voltage | — | 5 V TTL-compatible I/O |
| Programming Method | — | Altera legacy programmer (EPROM-based) |
| Architecture | — | LAB-based with Programmable Interconnect Array (PIA) |
| I/O Standard | — | TTL |
| Katayuan ng Lifecycle | — | Obsolete - last-time-buy stock only |
| Datasheet Document | — | Altera MAX 5000 family datasheet (per alldatasheet.com) |